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2019-08-20imx: imx6: uboot_ddr_init: Import u-boot DDR init codeBryan O'Donoghue
Import u-boot DDR init code for imx6ul. Since the u-boot stuff is GPL-2.0+ we can't send it to the ATF repo. Therefore this patch must not be included in any PR to ATF. It should probably be a standalone patch in the meta-mbl layer and applied during building of the i.MX6 ATF binary. For now just stack it as a patch for the Linaro landing area to host. Original code from u-boot upstream: 83d290c56fab2d38cd1ab4c4cc7099559c1d5046 https://gitlab.denx.de/u-boot/u-boot/blob/master/arch/arm/mach-imx/mx6/ddr.c https://gitlab.denx.de/u-boot/u-boot/blob/master/include/linux/kernel.h https://gitlab.denx.de/u-boot/u-boot/blob/master/board/technexion/pico-imx6ul/spl.c https://gitlab.denx.de/u-boot/u-boot/blob/master/arch/arm/include/asm/arch-mx6/mx6-ddr.h https://gitlab.denx.de/u-boot/u-boot/blob/master/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-20imx8mm: increase FIP image sizeJun Nie
Othwise below assert happens when loading certificate file that locates in the end part of FIP. ASSERT: drivers/io/io_block.c:159 BACKTRACE: START: assert Signed-off-by: Jun Nie <jun.nie@linaro.org> Change-Id: I5a94df59cf1b63657bfe336ca064f40acc6a753e
2019-08-20imx8mm: Add mmc as fip image storageJun Nie
- Add SD device and add it to io map storage. - move timer init earlier because SD driver need delay function. Signed-off-by: Jun Nie <jun.nie@linaro.org> Change-Id: I3b2b8914460fd2ccd97dd7f30cf233b4df4f6eab
2019-08-15imx6: imx6ul_picopi: Add in new imx6ul picopi portBryan O'Donoghue
This patch adds in a port for the i.MX6UL Pico PI from Technexion. Right now only files that really differ from the i.MX7D pico are: - imx6ul_picopi_bl2_el3_setup.c - plat/imx/imx6/include/imx_regs.h - plat/imx/imx6/include/imx_io_mux.h There may be some more differences as we enable trusted boot but, for now this initial version differs only very slightly at the clock and mux level. The higher level FIP logic is unchanged and similarly the HAB failover works as it does on the i.MX7. In order to compile up the u-boot ddr intiialization code 1. Populate plat/imx/imx6/common/uboot_ddr_init with patched u-boot files: arch/arm/mach-imx/mx6/ddr.c arch/arm/include/asm/arch-mx6/mx6-ddr.h arch/arm/include/asm/arch-mx6/mx6ul-ddr.h 2. Specify BUILD_UBOOT_DRAM_INIT=1 when building The resulting binary will be dual-license BSD/GPL-2.0+. See board documentation for further details. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx6: imx6ul_picopi: atf_uboot_compat Add simple compatibility headerBryan O'Donoghue
In order to import u-boot DDR initialization code we will need to provide some very simple is_imx6ul() type functions. We can inline those simple functions in a compatibility header licensed BSD like the rest of ATF. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx: imx_io_mux: Add imx_io_muxc_set_pad_select_input()Bryan O'Donoghue
Pins have individual MUX functions but, it is also the case that different muxed pins can be assigned to different IP blocks. The processes of selecting one of an array of pins for a block function is called selecting the input. Provide a simple wrapper around pad input selection now. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06plat: imx7: imx6_clock: Add a simple i.MX6 clock setupBryan O'Donoghue
This patch adds a simple i.MX6 clock setup layer. We turn on all clocks by default. Later on the runtime OS can switch off/on clocks as necessary. To begin with though all clocks on makes initial bringup easier and less error prone. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx: imx_clock: Remove unuse imx_clock.h headerBryan O'Donoghue
When we made the original i.MX7 port the idea of having shared clock headers seemed like a good one. Adding in the i.MX6 though its clear there's not much cross-over between the two SoC architectures in this regard. As a result we can remove imx_clock.h. Do so now. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx: imx_io_mux: Remove unuse imx_io_mux.h headerBryan O'Donoghue
When we made the original i.MX7 port the idea of having shared io mux headers seemed like a good one. Adding in the i.MX6 though its clear there's not much cross-over between the two SoC architectures at the register location level. As a result imx_io_mux.h is not necessary or desirable. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx: imx_wdog: Only initialize the number of watchdogs we haveBryan O'Donoghue
Depending on the SoC arch in question we have a variable number of watchdogs. The number of watchdogs is defined in the imx_regs.h for a given SoC arch. This patch incrementally initializes watchdogs depending on the number given in imx_regs.h. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06plat: imx7: imx7_clock: Aggregate imx7 clocks into one fileBryan O'Donoghue
Previous patches split up the imx7 clock layer into different pieces in expectation that some of those pieces would be reusable across different SoC architectures. When implementing the i.MX6UL clock layer though its obvious that the clocking structure is quite different between the different SoC architectures, so, it makes sense to conglomerate the i.MX7 stuff into an i.MX7 specific set of files. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx7: imx_io_mux: Rename common imx_io_mux to imx7 specific versionBryan O'Donoghue
Doing a port of the i.MX6 its obvious we will need SoC family specific io_mux definitions. The first step in that is moving plat/imx/common/include/imx_io_mux.h to plat/imx/imx7/include/imx_io_mux.h. The second step will be creating an i.MX6 specific version of it to capture what we need to do for i.MX6. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx: imx_aips: Iterate over number of elements defined not calculatedBryan O'Donoghue
This patch allows a value defined in imx_regs.h to indicate how many elements ought to be iterated over to configure AIPS blocks. This way we can have differentiation between i.MX6ULL and i.MX6UL which contain respectively three and two AIPS blocks. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx7: imx_regs: Remove AIPS4 defintionBryan O'Donoghue
In the specification the area is marked as reserved not as AIPS4. Fix the error by subtracting the definition of AIPS4 now. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-08-06imx7: imx_regs: Define the number of AIPS blocks to configureBryan O'Donoghue
In order to make the AIPS configuration code more portable between i.MX6 and i.MX7 we need to define the number of AIPS blocks to work with. Do that now for i.MX7. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-07-19plat: Add FIP offset to make it fexiable to changeJun Nie
Add FIP_ROM_OFFSET to make it fexiable to be changed in build time. Signed-off-by: Jun Nie <jun.nie@linaro.org> Change-Id: I0dd65251de6b1280d0784b3cc4bae8a5dcf67fe0
2019-05-31plat: imx8m: Set AIPSTZ config for when TEE is switched onBryan O'Donoghue
Sets up AIPSTZ configuration when TEE is on. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8mm: Enable Trusted BootBryan O'Donoghue
This patch enables Trusted Boot on the i.MX8MM with BL2 doing image verification from a FIP prior to hand-over to BL31. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8mm: Add in BL2 with FIPBryan O'Donoghue
Adds bl2 with FIP to the build build required for mbed Linux booting where we do: BootROM -> BL2 -> OPTEE -> u-boot If BUILD_BL2 is specified then BL2 will be built and BL31 will have its address range modified upwards to accommodate. BL31 must be loaded from a FIP in this case. If BUILD_BL2 is not specified then the current BL31 boot flow is unaffected and u-boot SPL will load and execute BL31 directly. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8: Add image load logic for MBL TBB FIP bootingBryan O'Donoghue
This is a copy/paste of the WaRP7 code sufficient to compile for i.MX8. Further changes will be required when extracting elements from a real FIP. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8mm: Add initial defintions to facilitate FIP layoutBryan O'Donoghue
Adds a number of definitions consistent with the established WaRP7 equivalents specifying number of io_handles and block devices. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8: Add image io-storage logic for MBL TBB FIP bootingBryan O'Donoghue
This is a copy/paste of the WaRP7 code sufficient to compile for i.MX8. Further changes will be required when extracting elements from a real FIP. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8: Add imx8mm_private.h to the buildBryan O'Donoghue
Allows for exporting of FIP related methods cleanly in a private header. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-31plat: imx8m: Configure CAAM job rings master ID for i.MX8MMBryan O'Donoghue
Commit 45a95e390859 ("imx: Configure CAAM job rings master ID for i.MX8MQ") fixes up the job-ring ownership permissions for the i.MX8MQ. This same fix is applicable and required for the i.MX8MM. Apply the same fix now. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-30plat: imx8m: Add support for exeucting a TEEBryan O'Donoghue
This patch adds support for handing off to a TEE BL32 prior to handing off to non-secure u-boot BL33. It is based on NXP's code from codeaurora.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-29picopi: Implement plat_get_mbedtls_heapBryan O'Donoghue
Commit 2374ab1799be ("Mbed TLS: Remove weak heap implementation") places a requirement on a platform to provide plat_get_mbedtls_heap(). This commit make that provision for imx7 pico. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-28pico: Fixup header pathsBryan O'Donoghue
Between the older versions of ATF and the never version we are moving to here, the header paths have changed. Minor update to fix. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-28pico: fix build failure due to header pathJun Nie
We need to specify include path with full path. Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-05-28plat: picopi: Rebase to latest master branch with enabling MULTI_CONSOLE_APIYing-Chun Liu (PaulLiu)
In this commit we rebase picopi to latest master branch. We need to specify some include with full path to avoid FTBFS. Also we start using MULTI_CONSOLE_API. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-05-28pico: io_storage: Remove DTB from FIPJun Nie
It is possible for OP-TEE to provide a DTB overlay directly to subsequent boot stages. So we do not need to bundle a DTB in the FIP. Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-05-28pico: add mmc io configJun Nie
Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-05-28pico: change uart pinmux to enable serial consoleJun Nie
Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-05-28picopi: Change name from warp7 to picopiJun Nie
Change name of files and variables from warp7 to picopi Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-05-28pico: copy warp7 folder as it isJun Nie
Copy warp7 folder as it is to start pico-pi development. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-05-20imx8: Replace PLAT_IMX8* with automatic PLAT_imx8*Leonard Crestez
Platform defines are already provided by the build system so let's not duplicate them. Change-Id: Icf1ea76c3c3213e27b447c95e2b22b961fa7693e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-05-20plat: imx8mq: Implement IMX_SIP_GET_SOC_INFOLeonard Crestez
The manual documents that 0x3036006c should contains the soc revision for imx8mq but this always reports A0. Work around this by parsing the ROM header and checking if OCOTP register 0x40 is stuck at 0xff0055aa. Determining this inside TF-A makes life easier for OS, see for example this linux discussion: https://lkml.org/lkml/2019/5/3/465 The soc revision can also be useful inside TF-A itself, for example for the non-upstream DDR DVFS "busfreq" feature is affected by 8mq erratas. The clock for OCOTP block can be disabled by OS so only initialize soc revision once at boot time. Change-Id: I9ca3f27840229ce8a28b53870e44da29f63c73aa Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-05-13plat: imx8mq: Remove duplicated linker symbolsJacky Bai
Remove duplicated linker symbols, resue the symbols defined in bl_common.h Change-Id: I10de450eccc78c09b61a8ae7126bf4f4029fa682 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-05-09plat: imx8m: Implement IMX_SIP_BUILDINFOLeonard Crestez
The IMX_SIP_BUILDINFO call was implemented for imx8qm and imx8qx but it's also applicable to imx8m. This fixes U-Boot not printing commit hash on 8m with upstream TF-A. Change-Id: Idcfd9729eaaccf329c24e241da325f1f6cd3c880 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-05-08plat: imx8mq: Only keep IRQ 32 unmaskedLeonard Crestez
Only IRQ 32 (SPI 0) needs to be kept unmasked, not everything divisible by 32. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Change-Id: I286b925eead89218cfeddd82f53a634f3447d212
2019-05-08plat: imx8mq: gpc: Enable all power domain by defaultLeonard Crestez
This is similar to imx8mm and allows uboot to run fastboot over USB otg. There is a different set of power domains on 8mq but same bits covers all off them. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Change-Id: I1151c2bc2d32b1e02b4db16285b3d30cabc0d64d
2019-04-12Mbed TLS: Remove weak heap implementationAmbroise Vincent
The implementation of the heap function plat_get_mbedtls_heap() becomes mandatory for platforms supporting TRUSTED_BOARD_BOOT. The shared Mbed TLS heap default weak function implementation is converted to a helper function get_mbedtls_heap_helper() which can be used by the platforms for their own function implementation. Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-04-08plat: imx8m: remove deprecated code includeJacky Bai
The 'drivers/console/aarch64/console.S' is not needed, so remove it from build to fix the build error when 'ERROR_DEPRECATED'set. Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-04-03Makefile: remove extra include paths in INCLUDESAmbroise Vincent
Now it is needed to use the full path of the common header files. Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-04-03Console: remove deprecated finish_console_registerAmbroise Vincent
The old version of the macro is deprecated. Commit cc5859ca19ff ("Multi-console: Deprecate the `finish_console_register` macro") provides more details. Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-13plat: imx8m: Add the basic support for imx8mmJacky Bai
The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators this patch add the basic support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-03-12plat: imx8m: refactor the code to make it reusableJacky Bai
for the i.MX8M SOCs, part of the code for gpc and PSCI implementation can be reused and make it common for all these SoCs. this patch extracts the common part for reuse. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-03-04Merge pull request #1837 from spencercw/masterAntonio Niño Díaz
imx: Configure CAAM job rings master ID for i.MX8MQ
2019-03-01imx: make sure GIC redistributor is awake before initializationAnson Huang
GICR_WAKER.ProcessorSleep can only be set to zero when: — GICR_WAKER.Sleep bit[0] == 0. — GICR_WAKER.Quiescent bit[31] == 0. On some platforms, when system reboot with GIC in sleep mode but with power ON, such as on NXP's i.MX8QM, Linux kernel enters suspend but could be requested to reboot, and GIC is in sleep mode and it is inside a power domain which is ON in this scenario, when CPU reset, the GIC driver trys to set CORE's redistributor interface to awake, with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] both set, the ProcessorSleep bit[1] will never be clear and cause system hang. This patch makes sure GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] are both zeor before clearing ProcessorSleep bit[1]. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-02-22imx: Configure CAAM job rings master ID for i.MX8MQChris Spencer
For i.MX8MQ B0 revision the default configuration of JRaMID is not valid to allow the kernel to use the CAAM job rings. This patch sets the master ID of the Cortex A in the JRaMID registers. Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk>
2019-02-12imx: warp7: Migrate to MULTI_CONSOLE_APIYing-Chun Liu (PaulLiu)
This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board. We also rename the functions in imx_uart driver to more specific one. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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