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AgeCommit message (Expand)Author
2019-10-22[InstCombine] Signed saturation patternsHEADmasterDavid Green
2019-10-22[InstCombine] Signed saturation tests. NFCDavid Green
2019-10-22[MIParser] Set RegClassOrRegBank during instruction parsingPetar Avramovic
2019-10-22[MIPS GlobalISel] Select MSA vector generic and builtin addPetar Avramovic
2019-10-22[PowerPC] Turn on CR-Logical reducer passNemanja Ivanovic
2019-10-22[ThinLTO] Don't internalize during promotionEugene Leviant
2019-10-21[X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) -> MOVMSK+CMP reductio...Simon Pilgrim
2019-10-21[X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) movmsk v2X64 testsSimon Pilgrim
2019-10-21AMDGPU/GlobalISel: Legalize fast unsafe FDIVAustin Kerbow
2019-10-21[CVP] No-wrap deduction for `shl`Roman Lebedev
2019-10-21[GISel][CombinerHelper] Add a combine turning shuffle_vector into concat_vectorsQuentin Colombet
2019-10-21AMDGPU: Use CopyToReg for interp intrinsic loweringMatt Arsenault
2019-10-21AMDGPU: Erase redundant redefs of m0 in SIFoldOperandsMatt Arsenault
2019-10-21AMDGPU: Stop adding m0 implicit def to SGPR spillsMatt Arsenault
2019-10-21[AMDGPU] Select AGPR in PHI operand legalizationStanislav Mekhanoshin
2019-10-21Reverted r375425 as it broke some buildbots.Sander de Smalen
2019-10-21[NFC][CVP] Add `shl` no-wrap deduction test coverageRoman Lebedev
2019-10-21[PowerPC] Regenerate test for D52431Simon Pilgrim
2019-10-21[AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)Sander de Smalen
2019-10-21Pre-commit test cases for D64713.Jay Foad
2019-10-21[ARM] Extra qdadd patternsDavid Green
2019-10-21[ARM] Add qadd lowering from a sadd_satDavid Green
2019-10-21[llvm/Object] - Make ELFObjectFile::getRelocatedSection return Expected<secti...George Rimar
2019-10-21[obj2yaml] - Fix a comment. NFC.George Rimar
2019-10-21[obj2yaml] - Stop triggering UB when dumping corrupted strings.George Rimar
2019-10-21[MemCpyOpt] Fixing Incorrect Code Motion while Handling Aggregate Type ValuesSam Elliott
2019-10-21[ARM] Lower sadd_sat to qadd8 and qadd16David Green
2019-10-21[ARM] Add and adjust saturation tests for upcoming qadd changes. NFCDavid Green
2019-10-21[CVP] Deduce no-wrap on `mul`Roman Lebedev
2019-10-21[InstCombine] Allow values with multiple users in SimplifyDemandedVectorEltsPiotr Sobczak
2019-10-21[IR] Fix mayReadFromMemory() for writeonly callsYevgeny Rouban
2019-10-21[BPF] fix indirect call assembly codeYonghong Song
2019-10-21[Attributor] Teach AANoCapture to use information in-flight more aggressivelyJohannes Doerfert
2019-10-20[X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emit...Craig Topper
2019-10-20[IndVars] Eliminate loop exits with equivalent exit countsPhilip Reames
2019-10-20[InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern.Roman Lebedev
2019-10-20[NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. ca...Roman Lebedev
2019-10-20[InstCombine] Fold uadd.sat(a, b) == 0 and usub.sat(a, b) == 0Nikita Popov
2019-10-20[InstCombine] Add tests for uadd/sub.sat(a, b) == 0; NFCNikita Popov
2019-10-20[InstCombine] Shift amount reassociation in shifty sign bit test (PR43595)Roman Lebedev
2019-10-20AMDGPU: Increase vcc liveness scan thresholdMatt Arsenault
2019-10-20AMDGPU: Split flat offsets that don't fit in DAGMatt Arsenault
2019-10-20AMDGPU: Add baseline tests for flat offset splittingMatt Arsenault
2019-10-20[yaml2obj][obj2yaml] - Do not create a symbol table by default.George Rimar
2019-10-20AMDGPU: Don't error on calls to null or undefMatt Arsenault
2019-10-19[SCEV] Simplify umin/max of zext and sext of the same valuePhilip Reames
2019-10-19[TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount Threshold ...Sanjay Patel
2019-10-19[MSP430] Shift Amount Threshold in DAGCombine (Baseline Tests); NFCSanjay Patel
2019-10-19[X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack argsSimon Pilgrim
2019-10-19[X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/fast-hopsSimon Pilgrim
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