diff options
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2018-10-30 18:18:05 +0000 |
|---|---|---|
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2018-10-30 18:18:05 +0000 |
| commit | 49dc1ef7c1a281e74a07e6c1a2a0a56cf6cc184f (patch) | |
| tree | ad868ff63e3c5b3f44ebae1ad5089371c2cf61a0 | |
| parent | 8adcdae67f47e2518cf678ec25cb50771720151b (diff) | |
checkpoint
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/constant@265635 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog.meissner | 9 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 42 |
2 files changed, 46 insertions, 5 deletions
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 67297b87a50..a5d68d04f64 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,12 @@ +2018-10-30 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.md (UNSPEC_SF_CONST_MEM): New unspecs. + (UNSPEC_SF_CONST_GPR): Likewise. + (movsf_const_direct_move): Rework yet again, don't alais results, + use helper functions instead. + (movsf_const_mem): Likewise. + (movsf_const_gpr): Likewise. + 2018-10-28 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/rs6000.c (rs6000_emit_move): Don't bother testing diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 3b48c55d405..0f8b977c5e8 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -147,6 +147,8 @@ UNSPEC_SIGNBIT UNSPEC_SF_FROM_SI UNSPEC_SI_FROM_SF + UNSPEC_SF_CONST_MEM + UNSPEC_SF_CONST_GPR ]) ;; @@ -7235,7 +7237,7 @@ (define_insn_and_split "movsf_const_direct_move" [(set (match_operand:SF 0 "nonimmediate_operand" "=wa,r,m") (match_operand:SF 1 "easy_fp_direct_move_constant" "wG,wG,wG")) - (clobber (match_scratch:DI 2 "=b,X,b"))] + (clobber (match_scratch:DI 2 "=b,b,b"))] "TARGET_DIRECT_MOVE_FP_CONSTANT" "#" "&& reload_completed" @@ -7262,18 +7264,48 @@ { long l; REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (src), l); + + rtx const_rtx = GEN_INT (l); if (MEM_P (dest)) { - emit_move_insn (tmp, GEN_INT (l)); - emit_move_insn (dest, gen_rtx_REG (SFmode, REGNO (tmp))); + emit_move_insn (tmp, const_rtx); + emit_insn (gen_movsf_const_mem (dest, tmp)); } else - emit_move_insn (gen_rtx_REG (SImode, REGNO (dest)), GEN_INT (l)); + { + if (!satisfies_constraint_L (const_rtx)) + { + emit_move_insn (tmp, const_rtx); + const_rtx = tmp; + } + + emit_insn (gen_movsf_const_gpr (dest, const_rtx)); + } + DONE; } } [(set_attr "type" "mftgpr,*,store") - (set_attr "length" "12,8,12")]) + (set_attr "length" "12")]) + +;; Helper function to store a SF constant to memory. +(define_insn "movsf_const_mem" + [(set (match_operand:SF 0 "memory_operand" "=m") + (unspec:SF [(match_operand:DI 1 "int_reg_operand" "r")] + UNSPEC_SF_CONST_MEM))] + "TARGET_DIRECT_MOVE_FP_CONSTANT" + "stw%U0%X0 %1,%0" + [(set_attr "type" "store")]) + +;; Helper function to load up a SF constant to a GPR. +(define_insn "movsf_const_gpr" + [(set (match_operand:SF 0 "int_reg_operand" "=r,r") + (unspec:SF [(match_operand:DI 1 "reg_or_cint_operand" "r,L")] + UNSPEC_SF_CONST_GPR))] + "TARGET_DIRECT_MOVE_FP_CONSTANT" + "@ + mr %0,%1 + lis %0,%v1") ;; Originally, we tried to keep movsf and movsd common, but the differences ;; addressing was making it rather difficult to hide with mode attributes. In |