checkpoint

git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/constant@265577 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 27 insertions, 33 deletions

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index aad444bbc61..67297b87a50 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,5 +1,12 @@
 2018-10-28  Michael Meissner  <meissner@linux.ibm.com>
 
+	* config/rs6000/rs6000.c (rs6000_emit_move): Don't bother testing
+	if the destination of moving a SFmode constant is not a GPR.
+	* config/rs6000/rs6000.md (movsf_const_direct_move): Churn, churn,
+	churn.  Combine vsx, gpr, memory cases.
+
+2018-10-28  Michael Meissner  <meissner@linux.ibm.com>
+
 	* config/rs6000/predicates.md (easy_fp_direct_move_constant): Use
 	TARGET_DIRECT_MOVE_FP_CONSTANT.
 	* config/rs6000/rs6000.h (TARGET_DIRECT_MOVE_FP_CONSTANT): New
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 4ce3f021593..708af926d8e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -10124,9 +10124,9 @@ rs6000_emit_move (rtx dest, rtx source, machine_mode mode)
       if (CONSTANT_P (operands[1]))
 	{
 	  /* Special case moving a SF constant to a VSX register by moving the
-	     DF value instead of the SF value.  */
-	  if (easy_fp_direct_move_constant (operands[1], mode)
-	      && !int_reg_operand_not_pseudo (operands[0], mode))
+	     DF value to a GPR and then doing a direct move to the VSX
+	     register.  */
+	  if (easy_fp_direct_move_constant (operands[1], mode))
 	    {
 	      emit_insn (gen_movsf_const_direct_move (operands[0],
 						      operands[1]));
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 46d8762e0e7..3b48c55d405 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7230,16 +7230,12 @@
 })
 
 ;; Code to load up a SF constant in a GPR and transfer it to a VSX register via
-;; direct move, or load up constant in a GPR and possibly store it.
-;;
-;; When we transfer the constant to a VSX register, we need to transfer it as a
-;; DFmode value instead of SFmode.  But if the final destination of the
-;; constant is a GPR or in memory, we need to use the SFmode value.
+;; direct move.  Note, we transfer the constant as a DFmode value instead of
+;; SFmode since we are moving it to a VSX register.
 (define_insn_and_split "movsf_const_direct_move"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=wa,b,m")
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=wa,r,m")
 	(match_operand:SF 1 "easy_fp_direct_move_constant" "wG,wG,wG"))
-   (clobber (match_scratch:DI 2 "=b,X,X"))
-   (clobber (match_scratch:SF 3 "=X,X,b"))]
+   (clobber (match_scratch:DI 2 "=b,X,b"))]
   "TARGET_DIRECT_MOVE_FP_CONSTANT"
   "#"
   "&& reload_completed"
@@ -7247,11 +7243,10 @@
 {
   rtx dest = operands[0];
   rtx src = operands[1];
+  rtx tmp = operands[2];
 
-  /* VSX register.  */
-  if (which_alternative == 0)
+  if (vsx_register_operand (dest, SFmode))
     {
-      rtx tmp_di = operands[2];
       int endian = (WORDS_BIG_ENDIAN == 0);
       long l[2];
       HOST_WIDE_INT val;
@@ -7259,34 +7254,26 @@
       val = ((HOST_WIDE_INT)(unsigned long)l[endian] << 32
 	     | ((HOST_WIDE_INT)(unsigned long)l[1 - endian]));
 
-      emit_move_insn (tmp_di, GEN_INT (val));
-      emit_insn (gen_p8_mtvsrd_sf (dest, tmp_di));
+      emit_move_insn (tmp, GEN_INT (val));
+      emit_insn (gen_p8_mtvsrd_sf (dest, tmp));
       DONE;
     }
-
-  /* GPR register or memory.  */
   else
     {
-      rtx gpr = MEM_P (operands[0]) ? operands[3] : operands[0];
       long l;
-
-      if (SUBREG_P (gpr))
-	{
-	  gcc_assert (SUBREG_BYTE (gpr) == 0);
-	  gpr = SUBREG_REG (gpr);
-	}
-
-      /* Generate the SUBREG and SET directly, rather than use gen_lowpart and
-	 emit_move_insn, since that might interfere with the no SFmode SUBREG
-	 code that is there to prevent intermixing SFmode values in GPRs and
-	 vector registers.  */
       REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (src), l);
-      emit_insn (gen_rtx_SET (gen_rtx_SUBREG (SImode, gpr, 0), GEN_INT (l)));
       if (MEM_P (dest))
-	emit_move_insn (dest, operands[3]);
+	{
+	  emit_move_insn (tmp, GEN_INT (l));
+	  emit_move_insn (dest, gen_rtx_REG (SFmode, REGNO (tmp)));
+	}
+      else
+	emit_move_insn (gen_rtx_REG (SImode, REGNO (dest)), GEN_INT (l));
       DONE;
     }
-})
+}
+  [(set_attr "type" "mftgpr,*,store")
+   (set_attr "length" "12,8,12")])
 
 ;; Originally, we tried to keep movsf and movsd common, but the differences
 ;; addressing was making it rather difficult to hide with mode attributes.  In