diff options
author | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-02-21 16:29:50 +0000 |
---|---|---|
committer | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-02-28 09:56:58 +0000 |
commit | 47949f3f83f2d55908d4708b5ecec918aa8553de (patch) | |
tree | 82f83836c204b9e54762dad975bd8d1eade1fd12 /lib | |
parent | 6e78973ea28def5a8cc59a434f3cdef5f3858d23 (diff) |
Cortex-A55: Implement workaround for erratum 903758
Change-Id: I07e69061ba7a918cdfaaa83fa3a42dee910887d7
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'lib')
-rw-r--r-- | lib/cpus/aarch64/cortex_a55.S | 34 | ||||
-rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
2 files changed, 42 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a55.S b/lib/cpus/aarch64/cortex_a55.S index 3099971d..1da80efa 100644 --- a/lib/cpus/aarch64/cortex_a55.S +++ b/lib/cpus/aarch64/cortex_a55.S @@ -142,6 +142,34 @@ func check_errata_846532 b cpu_rev_var_ls endfunc check_errata_846532 + /* ----------------------------------------------------- + * Errata Workaround for Cortex A55 Errata #903758. + * This applies only to revisions <= r0p1 of Cortex A55. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * ----------------------------------------------------- + */ +func errata_a55_903758_wa + /* + * Compare x0 against revision r0p1 + */ + mov x17, x30 + bl check_errata_903758 + cbz x0, 1f + mrs x1, CORTEX_A55_CPUACTLR_EL1 + orr x1, x1, #CORTEX_A55_CPUACTLR_EL1_DISABLE_L1_PAGEWALKS + msr CORTEX_A55_CPUACTLR_EL1, x1 + isb +1: + ret x17 +endfunc errata_a55_903758_wa + +func check_errata_903758 + mov x1, #0x01 + b cpu_rev_var_ls +endfunc check_errata_903758 + func cortex_a55_reset_func mov x19, x30 @@ -172,6 +200,11 @@ func cortex_a55_reset_func bl errata_a55_846532_wa #endif +#if ERRATA_A55_903758 + mov x0, x18 + bl errata_a55_903758_wa +#endif + ret x19 endfunc cortex_a55_reset_func @@ -209,6 +242,7 @@ func cortex_a55_errata_report report_errata ERRATA_A55_778703, cortex_a55, 778703 report_errata ERRATA_A55_798797, cortex_a55, 798797 report_errata ERRATA_A55_846532, cortex_a55, 846532 + report_errata ERRATA_A55_903758, cortex_a55, 903758 ldp x8, x30, [sp], #16 ret diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 644c9cdf..98d59ef5 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -95,6 +95,10 @@ ERRATA_A55_798797 ?=0 # only to revision <= r0p1 of the Cortex A55 cpu. ERRATA_A55_846532 ?=0 +# Flag to apply erratum 903758 workaround during reset. This erratum applies +# only to revision <= r0p1 of the Cortex A55 cpu. +ERRATA_A55_903758 ?=0 + # Flag to apply erratum 806969 workaround during reset. This erratum applies # only to revision r0p0 of the Cortex A57 cpu. ERRATA_A57_806969 ?=0 @@ -180,6 +184,10 @@ $(eval $(call add_define,ERRATA_A55_798797)) $(eval $(call assert_boolean,ERRATA_A55_846532)) $(eval $(call add_define,ERRATA_A55_846532)) +# Process ERRATA_A55_903758 flag +$(eval $(call assert_boolean,ERRATA_A55_903758)) +$(eval $(call add_define,ERRATA_A55_903758)) + # Process ERRATA_A57_806969 flag $(eval $(call assert_boolean,ERRATA_A57_806969)) $(eval $(call add_define,ERRATA_A57_806969)) |