diff options
| author | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-02-21 16:29:16 +0000 |
|---|---|---|
| committer | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-02-28 09:56:58 +0000 |
| commit | 6e78973ea28def5a8cc59a434f3cdef5f3858d23 (patch) | |
| tree | 76d54e15c598c6ea8f1c64d12b26628a6d26daa4 /lib | |
| parent | 6ab87d29817846cd439afe42b3c216385b1b14dd (diff) | |
Cortex-A55: Implement workaround for erratum 846532
Change-Id: Iacb6331c1f6b27340e71279f92f147ebbc71862f
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a55.S | 38 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
2 files changed, 46 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a55.S b/lib/cpus/aarch64/cortex_a55.S index b0d5d4d5..3099971d 100644 --- a/lib/cpus/aarch64/cortex_a55.S +++ b/lib/cpus/aarch64/cortex_a55.S @@ -110,6 +110,38 @@ func check_errata_798797 b cpu_rev_var_ls endfunc check_errata_798797 + /* -------------------------------------------------------------------- + * Errata Workaround for Cortex A55 Errata #846532. + * This applies only to revisions <= r0p1 of Cortex A55. + * Disabling dual-issue has a small impact on performance. Disabling a + * power optimization feature is an alternate workaround with no impact + * on performance but with an increase in power consumption (see errata + * notice). + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------------------------- + */ +func errata_a55_846532_wa + /* + * Compare x0 against revision r0p1 + */ + mov x17, x30 + bl check_errata_846532 + cbz x0, 1f + mrs x1, CORTEX_A55_CPUACTLR_EL1 + orr x1, x1, #CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE + msr CORTEX_A55_CPUACTLR_EL1, x1 + isb +1: + ret x17 +endfunc errata_a55_846532_wa + +func check_errata_846532 + mov x1, #0x01 + b cpu_rev_var_ls +endfunc check_errata_846532 + func cortex_a55_reset_func mov x19, x30 @@ -135,6 +167,11 @@ func cortex_a55_reset_func bl errata_a55_798797_wa #endif +#if ERRATA_A55_846532 + mov x0, x18 + bl errata_a55_846532_wa +#endif + ret x19 endfunc cortex_a55_reset_func @@ -171,6 +208,7 @@ func cortex_a55_errata_report report_errata ERRATA_A55_768277, cortex_a55, 768277 report_errata ERRATA_A55_778703, cortex_a55, 778703 report_errata ERRATA_A55_798797, cortex_a55, 798797 + report_errata ERRATA_A55_846532, cortex_a55, 846532 ldp x8, x30, [sp], #16 ret diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index dc1540d8..644c9cdf 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -91,6 +91,10 @@ ERRATA_A55_778703 ?=0 # only to revision r0p0 of the Cortex A55 cpu. ERRATA_A55_798797 ?=0 +# Flag to apply erratum 846532 workaround during reset. This erratum applies +# only to revision <= r0p1 of the Cortex A55 cpu. +ERRATA_A55_846532 ?=0 + # Flag to apply erratum 806969 workaround during reset. This erratum applies # only to revision r0p0 of the Cortex A57 cpu. ERRATA_A57_806969 ?=0 @@ -172,6 +176,10 @@ $(eval $(call add_define,ERRATA_A55_778703)) $(eval $(call assert_boolean,ERRATA_A55_798797)) $(eval $(call add_define,ERRATA_A55_798797)) +# Process ERRATA_A55_846532 flag +$(eval $(call assert_boolean,ERRATA_A55_846532)) +$(eval $(call add_define,ERRATA_A55_846532)) + # Process ERRATA_A57_806969 flag $(eval $(call assert_boolean,ERRATA_A57_806969)) $(eval $(call add_define,ERRATA_A57_806969)) |