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2013-02-21ARM: hs: add clock driver to hi4511LiXin
Add clock driver based on common clock framework to hi4511. Signed-off-by: LiXin <li.xin@linaro.org>
2013-02-21HS: add SFC nodeMingjun Zhang
also add mtdparts in choose for easier use Signed-off-by: Mingjun Zhang <troy.zhangmingjun@huawei.com>
2013-02-21mtd: HS SFC: add SFC driver for serial NOR flashMingjun Zhang
Hisilicon Serial NOR Flash controller provide three ways to access the serial NOR flash chip: by reg interface, mapping it to a range of bus address and using dma. This driver implement the dma read/write ops and reg erase ops. Signed-off-by: Mingjun Zhang <troy.zhangmingjun@huawei.com>
2013-02-21ARM: hs: add dma and i2c resourceZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21i2c: designware: Add i2c-designware-hs.cZhangfei Gao
Add support hisilicon i2c driver, which reuse designware i2c ip Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21i2c-designware: support no DW_IC_COMP_TYPE platformZhangfei Gao
Check accessor_flags before reading DW_IC_COMP_TYPE Give chance to platform no such register Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21dmaengine: Add hisilicon k3 DMA engine driverZhangfei Gao
Add dmaengine driver for hisilicon k3 platform based on virt_dma Tested with dmatest.ko Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21dmaengine: add helper function to request a slave DMA channelJon Hunter
Currently slave DMA channels are requested by calling dma_request_channel() and requires DMA clients to pass various filter parameters to obtain the appropriate channel. With device-tree being used by architectures such as arm and the addition of device-tree helper functions to extract the relevant DMA client information from device-tree, add a new function to request a slave DMA channel using device-tree. This function is currently a simple wrapper that calls the device-tree of_dma_request_slave_channel() function. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21dmaengine: fix !of_dma compilation warningVinod Koul
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: dma: fix protection of DMA controller data stored by DMA helpersJon Hunter
In the current implementation of the OF DMA helpers, read-copy-update (RCU) linked lists are being used for storing and accessing the DMA controller data. This part of implementation is based upon V2 of the DMA helpers by Nicolas [1]. During a recent review of RCU, it became apparent that the code is missing the required rcu_read_lock()/unlock() calls as well as synchronisation calls before freeing any memory protected by RCU. Having looked into adding the appropriate RCU calls to protect the DMA data it became apparent that with the current DMA helper implementation, using RCU is not as attractive as it may have been before. The main reasons being that ... 1. We need to protect the DMA data around calls to the xlate function. 2. The of_dma_simple_xlate() function calls the DMA engine function dma_request_channel() which employs a mutex and so could sleep. 3. The RCU read-side critical sections must not sleep and so we cannot hold an RCU read lock around the xlate function. Therefore, instead of using RCU, an alternative for this use-case is to employ a simple spinlock inconjunction with a usage count variable to keep track of how many current users of the DMA data structure there are. With this implementation, the DMA data cannot be freed until all current users of the DMA data are finished. This patch is based upon the DMA helpers fix for potential deadlock [2]. [1] http://article.gmane.org/gmane.linux.ports.arm.omap/73622 [2] http://marc.info/?l=linux-arm-kernel&m=134859982520984&w=2 Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: dma- fix build break for !CONFIG_OFVinod Koul
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: dma: fix potential deadlock when requesting a slave channelJon Hunter
In the latest version of the OF dma handlers I added support (rather hastily) to exhaustively search for an available dma slave channel, for the use-case where we have alternative slave channels that can be used. In the current implementation a deadlock scenario can occur causing the CPU to loop forever. The scenario is as follows ... 1. There are alternative channels avaialble 2. The first channel that is found by calling of_dma_find_channel() is not available and so the call to the xlate function returns NULL. In this case we will call of_dma_find_channel() again but we will return the same channel that we found the first time and hence, again the xlate will return NULL and we will loop here forever. Fix this potential deadlock by just using a single for-loop and not a for-loop nested in a do-while loop. This change also replaces the function of_dma_find_channel() with of_dma_match_channel() which performs a simple check to see if a DMA channel matches the name specified. I have tested this implementation on an OMAP4 panda board by adding a dummy DMA specifier, that will cause the xlate function to return NULL, to the beginning of a list of DMA specifiers for a DMA client. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: Add generic device tree DMA helpersJon Hunter
This is based upon the work by Benoit Cousson [1] and Nicolas Ferre [2] to add some basic helpers to retrieve a DMA controller device_node and the DMA request/channel information. Aim of DMA helpers - The purpose of device-tree is to describe the capabilites of the hardware. Thinking about DMA controllers purely from the context of the hardware to begin with, we can describe a device in terms of a DMA controller as follows ... 1. Number of DMA controllers 2. Number of channels (maybe physical or logical) 3. Mapping of DMA requests signals to DMA controller 4. Number of DMA interrupts 5. Mapping of DMA interrupts to channels - With the above in mind the aim of the DT DMA helper functions is to extract the above information from the DT and provide to the appropriate driver. However, due to the vast number of DMA controllers and not all are using a common driver (such as DMA Engine) it has been seen that this is not a trivial task. In previous discussions on this topic the following concerns have been raised ... 1. How does the binding support devices with multiple DMA controllers? 2. How to support both legacy DMA controllers not using DMA Engine as well as those that support DMA Engine. 3. When using with DMA Engine how do we support the various implementations where the opaque filter function parameter differs between implementations? 4. How do we handle DMA channels that are identified with a string versus a integer? - Hence the design of the DMA helpers has to accomodate the above or align on an agreement what can be or should be supported. Design of DMA helpers 1. Registering DMA controllers In the case of DMA controllers that are using DMA Engine, requesting a channel is performed by calling the following function. struct dma_chan *dma_request_channel(dma_cap_mask_t mask, dma_filter_fn filter_fn, void *filter_param); The mask variable is used to match a type of the device controller in a list of controllers. The filter_fn and filter_param are used to identify the required dma channel and return a handle to the dma channel of type dma_chan. From the examples I have seen, the mask and filter_fn are constant for a given DMA controller and therefore, we can specify these as controller specific data when registering the DMA controller with the device-tree DMA helpers. The filter_param variable is of an unknown type and is typically specific to the DMA engine implementation for a given DMA controller. To allow some flexibility in the type and formating of this filter_param we employ an xlate to translate the device-tree binding information into the appropriate format. The xlate function used for a DMA controller can also be specified when registering the DMA controller with the device-tree DMA helpers. Based upon the above, a function for registering the DMA controller with the DMA helpers now looks like the below. The data variable is used to pass a pointer to DMA controller specific data used by the xlate function. int of_dma_controller_register(struct device_node *np, struct dma_chan *(*of_dma_xlate) (struct of_phandle_args *, struct of_dma *), void *data) For example, in the case where DMA engine is used, we define the following structure (that stores the DMA engine capability mask and filter function) and pass this to the data variable in the above function. struct of_dma_filter_info { dma_cap_mask_t dma_cap; dma_filter_fn filter_fn; }; 2. Representing and requesting channel information Please see the dma binding documentation included in this patch for a description of how DMA controllers and client information should be represented with device-tree. For more information on how this binding came about please see [3]. In addition to this, feedback received from the Linux kernel summit showed a consensus (among those who attended) to use a name to identify DMA client information [4]. A DMA channel can be requested by calling the following function, where name is a required parameter used for identifying a DMA channel. This function has been designed to return a structure of type dma_chan to work with the DMA engine driver. Note that if DMA engine is used then drivers should be using the DMA engine API dma_request_slave_channel() (implemented in part 2 of this series, "dmaengine: add helper function to request a slave DMA channel") which will in turn call the below function if device-tree is present. The aim being to have a common DMA engine interface regardless of whether device tree is being used. struct dma_chan *of_dma_request_slave_channel(struct device_node *np, char *name) 3. Supporting legacy devices not using DMA Engine These devices present a problem, as there may not be a uniform way to easily support them with regard to device tree. Ideally, these should be migrated to DMA engine. However, if this is not possible, then they should still be able to use this binding, the only constaint imposed by this implementation is that when requesting a DMA channel via of_dma_request_slave_channel(), it will return a type of dma_chan. This implementation has been tested on OMAP4430 using the kernel v3.6-rc5. I have validated that MMC is working on the PANDA board with this implementation. My development branch for testing on OMAP can be found here [5]. v6: - minor corrections in DMA binding documentation v5: - minor update to binding documentation - added loop to exhaustively search for a slave channel in the case where there could be alternative channels available v4: - revert the removal of xlate function from v3 - update the proposed binding format and APIs based upon discussions [3] v3: - avoid passing an xlate function and instead pass DMA engine parameters - define number of dma channels and requests in dma-controller node v2: - remove of_dma_to_resource API - make property #dma-cells required (no fallback anymore) - another check in of_dma_xlate_onenumbercell() function [1] http://article.gmane.org/gmane.linux.drivers.devicetree/12022 [2] http://article.gmane.org/gmane.linux.ports.arm.omap/73622 [3] http://marc.info/?l=linux-omap&m=133582085008539&w=2 [4] http://pad.linaro.org/arm-mini-summit-2012 [5] https://github.com/jonhunter/linux/tree/dev-dt-dma Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21ARM: hs: add smp resource to dtsZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21ARM: hs: support smpZhangfei Gao
uboot requirement: CPUn: enable gic cpu interface; 1: wfi; check regn; /* notes: CPUn check own specific regn */ if (reg == 0) goto 1; else disable gic cpu interface set pc regn Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Zhang Mingjun <zhang.mingjun@linaro.org> Tested-by: Li Xin <li.xin@linaro.org>
2013-02-21ARM: hs: hi3716 dts modificationZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21info: more comments about hi6421 regulatorGuodong Xu
Add more comments regarding hi6421 regulator. They are found during reconstructuring hi6421 driver from v3.0.8 to v3.8 device tree mode. Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21Comments to HiSilicon on code upgrade and reviewGuodong Xu
2013-02-21Document: dts: create hisilicon documentHaojian Zhuang
Append the illustration on two boards from hisilicon. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: dts: append l2 aux property in hi3620Haojian Zhuang
L2 aux property is used to initialize L2 cache. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: hs: enable l2 cacheHaojian Zhuang
Enable l2 cache on hisilicon SoC platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: dts: fix the mapping on l2 cacheHaojian Zhuang
The register mapping on L2 cache is wrong. So it results failure on enabling L2 cache. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: dts: append rtc into hi4511 platformHaojian Zhuang
Enable rtc device in hi4511 platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: dts: add config file for Hisilicon SoCHaojian Zhuang
Add the default config of Hisilicon SoC. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: hs: add hi3716 dts supportZhangfei Gao
Add the support the hi3716 platform. Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: hs: add debug ll support for HI3716 UART0Zhangfei Gao
Add debug ll support for Hi3716 UART0. Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: hs: enable hi4511 with device treeHaojian Zhuang
Enable Hisilicon Hi4511 development platform with device tree support. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21pinctrl: single: support generic pinconfHaojian Zhuang
Support the operation of generic pinconf. The supported config arguments are INPUT_SCHMITT, INPUT_SCHMITT_DISABLE, POWER_SOURCE, BIAS_DISABLE, BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21pinctrl: single: set function mask as optionalHaojian Zhuang
Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21pinctrl: generic: dump pin configurationHaojian Zhuang
Add the support of dumping pin configuration. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21pinctrl: generic: add slew rate config parameterHaojian Zhuang
Add PIN_CONFIG_SLEW_RATE parameter into pinconf-generic driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21pinctrl: single: create new gpio function rangeHaojian Zhuang
Since gpio driver could create gpio range in DTS, it could invokes pinctrl_request_gpio(). In the pinctrl-single driver, it needs to configure pins with gpio function mode. A new gpio function range should be created in DTS file in below. pinctrl-single,gpio-range = <phandle pin_offset nr_pins gpio_func>; range: gpio-range { #pinctrl-single,gpio-range-cells = <3>; }; The difference between gpio-ranges property in gpio driver and pinctrl-single,gpio-range property in pinctrl-single driver. 1. gpio-ranges = <phandle gpio_offset_in_chip pin_offset nr_pins> gpio-ranges = < &pmx0 0 89 1 &pmx0 1 89 1 &pmx0 2 90 1 &pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>; 2. gpio driver could get pin offset from gpio-ranges property. pinctrl-single driver could get gpio function mode from gpio_func that is stored in @gpiofuncs list in struct pcs_device. This new pinctrl-single,gpio-range is used as complement for gpio-ranges property in gpio driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: pl061: set initcall level to module initHaojian Zhuang
Replace subsys initcall by module initcall level. Since pinctrl driver is already launched before gpio driver. It's unnecessary to set gpio driver in subsys init call level. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: pl061: bind pinctrl by gpio requestHaojian Zhuang
Add the pl061_gpio_request() to request pinctrl. Create the logic between pl061 gpio driver and pinctrl (pinctrl-single) driver. While a gpio pin is requested, it will request pinctrl driver to set that pin with gpio function mode. So pinctrl driver should append .gpio_request_enable() in pinmux_ops. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: pl061: allocate irq dynamicallyHaojian Zhuang
In original implementation, irq base is always specified in platform data. If it's not specified, pl061 gpio driver can't pass the probe() function since irq base is missing. While moving to device tree, everything should be parsed from DTS file. So allocate irq dynamically for irq base. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: find gpio base by ascend orderHaojian Zhuang
gpiochip_find_base() always tries to find valid gpio with descend order. It's inconvient if gpio information is passing from DTS. Now try to find valid gpio with ascend order. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: fix wrong checking condition for gpio rangeHaojian Zhuang
Since index++ calculates from 0, the checking condition of "while (index++)" is always fake. So replace it by unconditional loop. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: set gpio range cells property as 3Haojian Zhuang
Add gpio offset into "gpio-range-cells" property. It's used to support sparse pinctrl range in gpio chip. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21gpio: use pinctrl device name for add rangeHaojian Zhuang
gpiochip_add_pin_range() needs pinctrl device name as parameter. Currently the parameter is pinctrl description name. So fix it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21pinctrl: core: get devname from pinctrl_devHaojian Zhuang
Add new function to get devname from pinctrl_dev. pinctrl_dev_get_name() can only get pinctrl description name. If we want to use gpio driver to find pinctrl device node, we need to fetch the pinctrl device name. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21tty: serial: use module_init on pl011_initHaojian Zhuang
If amba serial driver is probed defer, amba serial driver may be probed after init process. So the error log shows in below. [ 0.389403] Warning: unable to open an initial console. [ 0.390107] Freeing init memory: 2328K It results in serial console not enabled. So replace arch_initcall by module_init on pl011_init(). The boot sequence is changed in below. pinctrl driver --> amba serial driver --> init process Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Alan Cox <alan@linux.intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-serial@vger.kernel.org
2013-02-21tty: serial: remove __init on pl011 console opsHaojian Zhuang
If uart driver is probed defer, console_setup will be called later after __init && __initdata sections destroyed. And amba_console isn't defined in __init or __initdata section. So we needn't define pl011_console_setup() && pl011_console_get_options() in __init section. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Alan Cox <alan@linux.intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-serial@vger.kernel.org
2013-02-21ARM: config: append arch hs into multi defconfigHaojian Zhuang
Append ARCH_HS (Hisilicon SoC) into multi_v7_defconfig. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: hs: add board support with device treeHaojian Zhuang
Add board support with device tree for Hisilicon Hi36xx/Hi37xx platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21clk: hs: add fix rate clock supportHaojian Zhuang
Add fix rate clock support with device tree on Hisilicon SoC. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-21ARM: debug: support debug ll on hisilicon socHaojian Zhuang
Support UART0 debug ll on hisilicon Hi3620 SoC. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-02-18Linux 3.8Linus Torvalds
2013-02-18Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull input subsystem fixes from Dmitry Torokhov: "Two small driver fixups and a documentation update for managed input devices" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: wacom - fix wacom_set_report retry logic Input: document that unregistering managed devices is not necessary Input: lm8323 - fix checking PWM interrupt status
2013-02-18mm: fix pageblock bitmap allocationLinus Torvalds
Commit c060f943d092 ("mm: use aligned zone start for pfn_to_bitidx calculation") fixed out calculation of the index into the pageblock bitmap when a !SPARSEMEM zome was not aligned to pageblock_nr_pages. However, the _allocation_ of that bitmap had never taken this alignment requirement into accout, so depending on the exact size and alignment of the zone, the use of that index could then access past the allocation, resulting in some very subtle memory corruption. This was reported (and bisected) by Ingo Molnar: one of his random config builds would hang with certain very specific kernel command line options. In the meantime, commit c060f943d092 has been marked for stable, so this fix needs to be back-ported to the stable kernels that backported the commit to use the right alignment. Bisected-and-tested-by: Ingo Molnar <mingo@kernel.org> Acked-by: Mel Gorman <mgorman@suse.de> Cc: stable@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-02-15Merge tag 'stable/for-linus-3.8-rc7-tag-two' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen Pull xen fixes from Konrad Rzeszutek Wilk: "Two fixes: - A simple bug-fix for redundant NULL check. - CVE-2013-0228/XSA-42: x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS and two reverts: - Revert the PVonHVM kexec. The patch introduces a regression with older hypervisor stacks, such as Xen 4.1." * tag 'stable/for-linus-3.8-rc7-tag-two' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: Revert "xen PVonHVM: use E820_Reserved area for shared_info" Revert "xen/PVonHVM: fix compile warning in init_hvm_pv_info" xen: remove redundant NULL check before unregister_and_remove_pcpu(). x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS.