aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorHaojian Zhuang <haojian.zhuang@linaro.org>2013-01-30 09:10:15 +0800
committerGuodong Xu <guodong.xu@linaro.org>2013-02-21 16:12:22 +0800
commit618aef7d599dd55a702e90bc0c44c196991c3bb5 (patch)
tree2ef151a866228d56c76757539e64fda15ef956f2
parentd2a2d9ad62be9c1bb1f8885b72b763b44682ae26 (diff)
ARM: dts: fix the mapping on l2 cache
The register mapping on L2 cache is wrong. So it results failure on enabling L2 cache. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
-rw-r--r--arch/arm/boot/dts/hi3620.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index 00685310dcb..37f047b3d99 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -70,7 +70,7 @@
l2: l2-cache {
compatible = "arm,pl310-cache";
- reg = <0xfc10000 0x100000>;
+ reg = <0xfc100000 0x100000>;
interrupts = <0 15 4>;
cache-unified;
cache-level = <2>;