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authorHaojian Zhuang <haojian.zhuang@linaro.org>2013-01-30 09:13:48 +0800
committerGuodong Xu <guodong.xu@linaro.org>2013-02-21 16:12:22 +0800
commit8f7ab35648ae87235c34727ee2b9da2fb18d58e2 (patch)
treea39299d4f6a59ac34c4820e8f7d6e5f779578a5d
parent618aef7d599dd55a702e90bc0c44c196991c3bb5 (diff)
ARM: hs: enable l2 cache
Enable l2 cache on hisilicon SoC platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
-rw-r--r--arch/arm/mach-hs/hs-dt.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-hs/hs-dt.c b/arch/arm/mach-hs/hs-dt.c
index 8599c0c91c4..9b79071fdb9 100644
--- a/arch/arm/mach-hs/hs-dt.c
+++ b/arch/arm/mach-hs/hs-dt.c
@@ -17,6 +17,7 @@
#include <linux/of_platform.h>
#include <asm/hardware/arm_timer.h>
+#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/timer-sp.h>
#include <asm/mach/arch.h>
@@ -71,9 +72,32 @@ static struct of_device_id hs_irq_match[] __initdata = {
{}
};
+static struct of_device_id hs_l2cache_match[] __initdata = {
+ { .compatible = "arm,pl310-cache", },
+ {}
+};
+
static void __init hs_irq_init(void)
{
+ struct device_node *node;
+ int ret;
+ u32 data[2];
+
of_irq_init(hs_irq_match);
+
+ node = of_find_matching_node(NULL, hs_l2cache_match);
+ WARN_ON(!node);
+ if (!node) {
+ pr_err("Failed to find l2cache\n");
+ return;
+ }
+ ret = of_property_read_u32_array(node, "hisilicon,l2cache-aux",
+ &data[0], 2);
+ if (ret < 0) {
+ data[0] = 0;
+ data[1] = ~0UL;
+ }
+ l2x0_of_init(data[0], data[1]);
}
static void __init hs_init(void)