diff options
| author | roland <none@none> | 2011-03-25 09:35:39 +0100 |
|---|---|---|
| committer | roland <none@none> | 2011-03-25 09:35:39 +0100 |
| commit | ca428d92172b6fd6b099822af2ba3d942a069bd9 (patch) | |
| tree | 4ebdf7e9c255604096880a2da1cb6a8134bc4ff3 /src/share/vm/opto/chaitin.cpp | |
| parent | 34a39323cada120e8e8426e1cbda45c6b3d7f2d1 (diff) | |
7029017: Additional architecture support for c2 compiler
Summary: Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never
Diffstat (limited to 'src/share/vm/opto/chaitin.cpp')
| -rw-r--r-- | src/share/vm/opto/chaitin.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/share/vm/opto/chaitin.cpp b/src/share/vm/opto/chaitin.cpp index 6108084f9..3c363e9ff 100644 --- a/src/share/vm/opto/chaitin.cpp +++ b/src/share/vm/opto/chaitin.cpp @@ -673,7 +673,7 @@ void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) { case Op_RegD: lrg.set_num_regs(2); // Define platform specific register pressure -#ifdef SPARC +#if defined(SPARC) || defined(ARM) lrg.set_reg_pressure(2); #elif defined(IA32) if( ireg == Op_RegL ) { |