diff options
Diffstat (limited to 'core/arch/arm/kernel/tz_ssvce_pl310_a32.S')
| -rw-r--r-- | core/arch/arm/kernel/tz_ssvce_pl310_a32.S | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/core/arch/arm/kernel/tz_ssvce_pl310_a32.S b/core/arch/arm/kernel/tz_ssvce_pl310_a32.S index f1d39bd5..b3f85cc1 100644 --- a/core/arch/arm/kernel/tz_ssvce_pl310_a32.S +++ b/core/arch/arm/kernel/tz_ssvce_pl310_a32.S @@ -20,7 +20,6 @@ * lock all L2 caches ways for data and instruction */ FUNC arm_cl2_lockallways , : -UNWIND( .fnstart) add r1, r0, #PL310_DCACHE_LOCKDOWN_BASE ldr r2, [r0, #PL310_AUX_CTRL] tst r2, #PL310_AUX_16WAY_BIT @@ -34,7 +33,6 @@ UNWIND( .fnstart) bne 1b mov pc, lr -UNWIND( .fnend) END_FUNC arm_cl2_lockallways /* @@ -53,7 +51,6 @@ END_FUNC arm_cl2_lockallways * clean & invalidate the whole L2 cache. */ FUNC arm_cl2_cleaninvbyway , : -UNWIND( .fnstart) syncbyway_set_mask r1 str r1, [r0, #PL310_FLUSH_BY_WAY] @@ -87,12 +84,10 @@ loop_cli_sync_done: bne loop_cli_sync_done mov pc, lr -UNWIND( .fnend) END_FUNC arm_cl2_cleaninvbyway /* void arm_cl2_invbyway(vaddr_t base) */ FUNC arm_cl2_invbyway , : -UNWIND( .fnstart) syncbyway_set_mask r1 str r1, [r0, #PL310_INV_BY_WAY] @@ -117,12 +112,10 @@ loop_inv_way_sync_done: bne loop_inv_way_sync_done mov pc, lr -UNWIND( .fnend) END_FUNC arm_cl2_invbyway /* void arm_cl2_cleanbyway(vaddr_t base) */ FUNC arm_cl2_cleanbyway , : -UNWIND( .fnstart) syncbyway_set_mask r1 str r1, [r0, #PL310_CLEAN_BY_WAY] @@ -147,7 +140,6 @@ loop_cl_way_sync_done: bne loop_cl_way_sync_done mov pc, lr -UNWIND( .fnend) END_FUNC arm_cl2_cleanbyway /* @@ -156,7 +148,6 @@ END_FUNC arm_cl2_cleanbyway * pl310value is one of PL310_CLEAN_BY_PA, PL310_INV_BY_PA or PL310_FLUSH_BY_PA */ LOCAL_FUNC _arm_cl2_xxxbypa , : -UNWIND( .fnstart) /* Align start address on PL310 line size */ and r1, #(~(PL310_LINE_SIZE - 1)) #ifdef SCU_BASE @@ -202,7 +193,6 @@ loop_xxx_pa_sync_done: bne loop_xxx_pa_sync_done mov pc, lr -UNWIND( .fnend) END_FUNC _arm_cl2_xxxbypa /* @@ -210,10 +200,8 @@ END_FUNC _arm_cl2_xxxbypa * clean L2 cache by physical address range. */ FUNC arm_cl2_cleanbypa , : -UNWIND( .fnstart) mov r3, #PL310_CLEAN_BY_PA b _arm_cl2_xxxbypa -UNWIND( .fnend) END_FUNC arm_cl2_cleanbypa /* @@ -221,10 +209,8 @@ END_FUNC arm_cl2_cleanbypa * invalidate L2 cache by physical address range. */ FUNC arm_cl2_invbypa , : -UNWIND( .fnstart) mov r3, #PL310_INV_BY_PA b _arm_cl2_xxxbypa -UNWIND( .fnend) END_FUNC arm_cl2_invbypa /* @@ -232,9 +218,7 @@ END_FUNC arm_cl2_invbypa * clean and invalidate L2 cache by physical address range. */ FUNC arm_cl2_cleaninvbypa , : -UNWIND( .fnstart) mov r3, #PL310_FLUSH_BY_PA b _arm_cl2_xxxbypa -UNWIND( .fnend) END_FUNC arm_cl2_cleaninvbypa |