diff options
| author | Cedric Neveux <cedric.neveux@nxp.com> | 2017-11-14 08:53:09 +0000 |
|---|---|---|
| committer | Silvano di Ninno <silvano.dininno@nxp.com> | 2018-08-02 15:37:21 +0200 |
| commit | 9bc17b209c23e65982b8b0f2b6d78830891ee195 (patch) | |
| tree | e9c9abe0901062a7f05af0f06b5a412741e3a4c3 /core | |
| parent | 1771973f67af71d1aa9db8ce55bb490d7456fb37 (diff) | |
TEE-243 core: arm: imx: Add SCU module
Add a SCU module
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'core')
| -rw-r--r-- | core/arch/arm/plat-imx/conf.mk | 2 | ||||
| -rw-r--r-- | core/arch/arm/plat-imx/imx.h | 3 | ||||
| -rw-r--r-- | core/arch/arm/plat-imx/imx6.c | 11 | ||||
| -rw-r--r-- | core/arch/arm/plat-imx/imx_scu.c | 25 | ||||
| -rw-r--r-- | core/arch/arm/plat-imx/sub.mk | 2 |
5 files changed, 33 insertions, 10 deletions
diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk index d1f81a63..148aa130 100644 --- a/core/arch/arm/plat-imx/conf.mk +++ b/core/arch/arm/plat-imx/conf.mk @@ -67,8 +67,8 @@ include core/arch/arm/cpu/cortex-a9.mk $(call force,CFG_MX6,y) $(call force,CFG_PL310,y) - CFG_PL310_LOCKED ?= y +CFG_SCU ?= y CFG_BOOT_SYNC_CPU ?= y CFG_BOOT_SECONDARY_REQUEST ?= y CFG_ENABLE_SCTLR_RR ?= y diff --git a/core/arch/arm/plat-imx/imx.h b/core/arch/arm/plat-imx/imx.h index 4aacc246..afcde28e 100644 --- a/core/arch/arm/plat-imx/imx.h +++ b/core/arch/arm/plat-imx/imx.h @@ -39,4 +39,7 @@ void imx_gpcv2_set_core1_pup_by_software(void); #ifdef CFG_CSU TEE_Result csu_init(void); #endif +#ifdef CFG_SCU +void scu_init(void); +#endif #endif diff --git a/core/arch/arm/plat-imx/imx6.c b/core/arch/arm/plat-imx/imx6.c index 962c1828..e8885587 100644 --- a/core/arch/arm/plat-imx/imx6.c +++ b/core/arch/arm/plat-imx/imx6.c @@ -32,14 +32,9 @@ void plat_cpu_reset_late(void) write32(BM_SRC_SCR_CPU_ENABLE_ALL, SRC_BASE + SRC_SCR); #endif - /* SCU config */ - write32(SCU_INV_CTRL_INIT, SCU_BASE + SCU_INV_SEC); - write32(SCU_SAC_CTRL_INIT, SCU_BASE + SCU_SAC); - write32(SCU_NSAC_CTRL_INIT, SCU_BASE + SCU_NSAC); - - /* SCU enable */ - write32(read32(SCU_BASE + SCU_CTRL) | 0x1, - SCU_BASE + SCU_CTRL); +#ifdef CFG_SCU + scu_init(); +#endif #ifdef CFG_CSU /* configure imx6 CSU */ diff --git a/core/arch/arm/plat-imx/imx_scu.c b/core/arch/arm/plat-imx/imx_scu.c new file mode 100644 index 00000000..364dda80 --- /dev/null +++ b/core/arch/arm/plat-imx/imx_scu.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright 2017-2018 NXP + * + */ + +#include <io.h> +#include <mm/core_memprot.h> +#include <kernel/tz_ssvce_pl310.h> + +#include <imx.h> + +void scu_init(void) +{ + vaddr_t scu_base = core_mmu_get_va(SCU_BASE, MEM_AREA_IO_SEC); + + /* SCU config */ + write32(SCU_INV_CTRL_INIT, scu_base + SCU_INV_SEC); + write32(SCU_SAC_CTRL_INIT, scu_base + SCU_SAC); + write32(SCU_NSAC_CTRL_INIT, scu_base + SCU_NSAC); + + /* SCU enable */ + write32(read32(scu_base + SCU_CTRL) | 0x1, scu_base + SCU_CTRL); +} + diff --git a/core/arch/arm/plat-imx/sub.mk b/core/arch/arm/plat-imx/sub.mk index 41b64563..3094644a 100644 --- a/core/arch/arm/plat-imx/sub.mk +++ b/core/arch/arm/plat-imx/sub.mk @@ -25,4 +25,4 @@ srcs-$(CFG_MX7) += imx7.c a7_plat_init.S subdirs-$(CFG_PSCI_ARM32) += pm srcs-$(CFG_CSU) += imx_csu.c - +srcs-$(CFG_SCU) += imx_scu.c |