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authorManoj Kumar <manoj.kumar3@arm.com>2018-10-26 10:27:12 +0530
committerdavidcunado-arm <david.cunado@arm.com>2018-10-30 16:58:33 +0000
commit662fb5a3af724dd19ea678f7ec898090b790feae (patch)
treefefb2d983f05ae4afc4e4bb276c6eb8d572f37a0 /product/n1sdp
parent90e307cbb3eb40063330e095d2cf6288a3af1219 (diff)
n1sdp: add mhu/scmi/sds header files for n1sdp SCP
Change-Id: Ide10244c5021c3abc6970c58aac6d247224f5271 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Diffstat (limited to 'product/n1sdp')
-rw-r--r--product/n1sdp/include/n1sdp_scp_mhu.h21
-rw-r--r--product/n1sdp/include/n1sdp_scp_scmi.h28
-rw-r--r--product/n1sdp/include/n1sdp_sds.h64
3 files changed, 113 insertions, 0 deletions
diff --git a/product/n1sdp/include/n1sdp_scp_mhu.h b/product/n1sdp/include/n1sdp_scp_mhu.h
new file mode 100644
index 00000000..79b9aadf
--- /dev/null
+++ b/product/n1sdp/include/n1sdp_scp_mhu.h
@@ -0,0 +1,21 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Description:
+ * MHU module device indexes.
+ */
+
+#ifndef N1SDP_SCP_MHU_H
+#define N1SDP_SCP_MHU_H
+
+enum scp_n1sdp_mhu_device_idx {
+ N1SDP_MHU_DEVICE_IDX_S_CLUS0,
+ N1SDP_MHU_DEVICE_IDX_NS_CLUS0,
+ N1SDP_MHU_DEVICE_IDX_S_MCP,
+ N1SDP_MHU_DEVICE_IDX_COUNT,
+};
+
+#endif /* N1SDP_SCP_MHU_H */
diff --git a/product/n1sdp/include/n1sdp_scp_scmi.h b/product/n1sdp/include/n1sdp_scp_scmi.h
new file mode 100644
index 00000000..becb8a1b
--- /dev/null
+++ b/product/n1sdp/include/n1sdp_scp_scmi.h
@@ -0,0 +1,28 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Description:
+ * Definitions for SCMI and SMT module configurations.
+ */
+
+#ifndef N1SDP_SCP_SCMI_H
+#define N1SDP_SCP_SCMI_H
+
+/* SCMI agent identifiers */
+enum scp_n1sdp_scmi_agent_id {
+ /* 0 is reserved for the platform */
+ SCP_SCMI_AGENT_ID_OSPM = 1,
+ SCP_SCMI_AGENT_ID_PSCI,
+};
+
+/* SCMI service indexes */
+enum scp_n1sdp_scmi_service_idx {
+ SCP_N1SDP_SCMI_SERVICE_IDX_PSCI,
+ SCP_N1SDP_SCMI_SERVICE_IDX_OSPM,
+ SCP_N1SDP_SCMI_SERVICE_IDX_COUNT,
+};
+
+#endif /* N1SDP_SCP_SCMI_H */
diff --git a/product/n1sdp/include/n1sdp_sds.h b/product/n1sdp/include/n1sdp_sds.h
new file mode 100644
index 00000000..6ca0b78a
--- /dev/null
+++ b/product/n1sdp/include/n1sdp_sds.h
@@ -0,0 +1,64 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef N1SDP_SDS_H
+#define N1SDP_SDS_H
+
+#include <mod_sds.h>
+
+/*
+ * Structure identifiers.
+ */
+enum n1sdp_sds_struct_id {
+ N1SDP_SDS_CPU_INFO = 1 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ N1SDP_SDS_FIRMWARE_VERSION = 2 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ N1SDP_SDS_PLATFORM_ID = 3 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ N1SDP_SDS_RESET_SYNDROME = 4 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ N1SDP_SDS_FEATURE_AVAILABILITY = 5 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ N1SDP_SDS_CPU_BOOTCTR = 6 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ N1SDP_SDS_CPU_FLAGS = 7 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+};
+
+/*
+ * Structure sizes.
+ */
+#define N1SDP_SDS_CPU_INFO_SIZE 4
+#define N1SDP_SDS_FIRMWARE_VERSION_SIZE 4
+#define N1SDP_SDS_PLATFORM_ID_SIZE 8
+#define N1SDP_SDS_RESET_SYNDROME_SIZE 4
+#define N1SDP_SDS_FEATURE_AVAILABILITY_SIZE 4
+#define N1SDP_SDS_CPU_BOOTCTR_SIZE 256
+#define N1SDP_SDS_CPU_FLAGS_SIZE 256
+
+/*
+ * Field masks and offsets for the N1SDP_SDS_AP_CPU_INFO structure.
+ */
+#define N1SDP_SDS_CPU_INFO_PRIMARY_MASK 0xFFFFFFFF
+#define N1SDP_SDS_CPU_INFO_PRIMARY_POS 0
+
+/*
+ * Platform information
+ */
+struct n1sdp_sds_platid {
+ /* Subsystem part number */
+ uint32_t platform_identifier;
+ /* Platform type information */
+ uint32_t platform_type_identifier;
+};
+
+/*
+ * Field masks and offsets for the N1SDP_SDS_FEATURE_AVAILABILITY structure.
+ */
+#define N1SDP_SDS_FEATURE_FIRMWARE_MASK 0x1
+#define N1SDP_SDS_FEATURE_DMC_MASK 0x2
+#define N1SDP_SDS_FEATURE_MESSAGING_MASK 0x4
+
+#define N1SDP_SDS_FEATURE_FIRMWARE_POS 0
+#define N1SDP_SDS_FEATURE_DMC_POS 1
+#define N1SDP_SDS_FEATURE_MESSAGING_POS 2
+
+#endif /* N1SDP_SDS_H */