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authorManoj Kumar <manoj.kumar3@arm.com>2018-10-26 10:21:45 +0530
committerdavidcunado-arm <david.cunado@arm.com>2018-10-30 16:58:33 +0000
commit90e307cbb3eb40063330e095d2cf6288a3af1219 (patch)
treebbab46cc5eb05733373fa59bea5ce4b07e4e28f7 /product/n1sdp
parent7db8f2223cd3ae7782b94c48fa081d03acf951c0 (diff)
n1sdp: add fmw_cmsis.h file for n1sdp SCP
Change-Id: I22bb77663fbae3c5bbc210d88b3e953575120022 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Diffstat (limited to 'product/n1sdp')
-rw-r--r--product/n1sdp/include/fmw_cmsis.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/product/n1sdp/include/fmw_cmsis.h b/product/n1sdp/include/fmw_cmsis.h
new file mode 100644
index 00000000..c5a80626
--- /dev/null
+++ b/product/n1sdp/include/fmw_cmsis.h
@@ -0,0 +1,34 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef FMW_CMSIS_H
+#define FMW_CMSIS_H
+
+#define __CHECK_DEVICE_DEFINES
+#define __CM7_REV 0x0000U
+#define __FPU_PRESENT 0U
+#define __MPU_PRESENT 1U
+#define __ICACHE_PRESENT 0U
+#define __DCACHE_PRESENT 0U
+#define __DTCM_PRESENT 0U
+#define __NVIC_PRIO_BITS 3U
+#define __Vendor_SysTickConfig 0U
+
+typedef enum IRQn {
+ NonMaskableInt_IRQn = -14,
+ MemoryManagement_IRQn = -12,
+ BusFault_IRQn = -11,
+ UsageFault_IRQn = -10,
+ SVCall_IRQn = -5,
+ DebugMonitor_IRQn = -4,
+ PendSV_IRQn = -2,
+ SysTick_IRQn = -1,
+} IRQn_Type;
+
+#include <core_cm7.h>
+
+#endif /* FMW_CMSIS_H */