OpenPlatformPkg: ARM GICv2/v3 Base Address width fix-up

According to the ACPI 6.0/6.1 spec, the physical base address of GICC,
GICD, GICR and GIC ITS is 64-bit. This patch is trying to fix the
original 32-bit width by using FixedPcdGet64() instead of FixedPcdGet32().

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

4 files changed, 90 insertions, 90 deletions

diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Madt.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Madt.aslc
index 600b984..4edb95d 100644
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Madt.aslc
+++ b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Madt.aslc
@@ -65,56 +65,56 @@ EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
     //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

     //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),

+        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),

+        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x160000 /* GicRBase */),

+        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x160000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x190000 /* GicRBase */),

+        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x190000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */),

+        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */),

+        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x220000 /* GicRBase */),

+        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x220000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x250000 /* GicRBase */),

+        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x250000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x280000 /* GicRBase */),

+        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x280000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */),

+        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */),

+        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x310000 /* GicRBase */),

+        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x310000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x340000 /* GicRBase */),

+        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x340000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x370000 /* GicRBase */),

+        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x370000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */),

+        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */),

+        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */),

   },

 

-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0, 0x4),

+  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 0x4),

   {

     EFI_ACPI_6_0_GIC_ITS_INIT(0,0x8C000000), // pc

     EFI_ACPI_6_0_GIC_ITS_INIT(1,0xC6000000), // dsa

diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
index 5861636..6e8557e 100644
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
+++ b/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
@@ -66,56 +66,56 @@ EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
     //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

     //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),

+        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),

+        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x160000 /* GicRBase */),

+        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x160000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x190000 /* GicRBase */),

+        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x190000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */),

+        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */),

+        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x220000 /* GicRBase */),

+        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x220000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x250000 /* GicRBase */),

+        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x250000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x280000 /* GicRBase */),

+        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x280000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */),

+        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */),

+        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x310000 /* GicRBase */),

+        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x310000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x340000 /* GicRBase */),

+        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x340000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x370000 /* GicRBase */),

+        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x370000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */),

+        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */),

     EFI_ACPI_5_1_GICC_STRUCTURE_INIT(

-        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

-        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */),

+        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

+        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */),

   },

 

-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0, 0x4),

+  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 0x4),

   {

     EFI_ACPI_6_0_GIC_ITS_INIT(0,0xC6000000),

   }

diff --git a/Platforms/ARM/Juno/AcpiTables/Madt.aslc b/Platforms/ARM/Juno/AcpiTables/Madt.aslc
index 78531d2..dffa5d6 100644
--- a/Platforms/ARM/Juno/AcpiTables/Madt.aslc
+++ b/Platforms/ARM/Juno/AcpiTables/Madt.aslc
@@ -55,14 +55,14 @@
       //       For now we leave CPU2 (A53-0) at the first position.

       //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

       //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

-      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 0, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0

-      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 1, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1

-      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 2, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2

-      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 3, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3

-      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 4, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0

-      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 5, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase))  // A57-1

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 0, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-0

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 1, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-1

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 2, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-2

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 3, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-3

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 4, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A57-0

+      EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 5, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet64 (PcdGicInterruptInterfaceBase))  // A57-1

     },

-    EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)

+    EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0)

   };

 #else

   #pragma pack (1)

@@ -100,25 +100,25 @@
       //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses

       //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.

       EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-0

-          2, 0, GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          2, 0, GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

           0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

       EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-1

-          3, 1, GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          3, 1, GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

           0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

       EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-2

-          4, 2, GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          4, 2, GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

           0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

       EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-3

-          5, 3, GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          5, 3, GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

           0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

       EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-0

-          0, 4, GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          0, 4, GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

           0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

       EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-1

-          1, 5, GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+          1, 5, GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

           0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),

     },

-    EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0, 2),

+    EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 2),

     // Format: EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(GicMsiFrameId, PhysicalBaseAddress, Flags, SPICount, SPIBase)

     EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, ARM_JUNO_GIV2M_MSI_SPI_COUNT, ARM_JUNO_GIV2M_MSI_SPI_BASE)

   };

diff --git a/Platforms/ARM/VExpress/AcpiTables/Madt.aslc b/Platforms/ARM/VExpress/AcpiTables/Madt.aslc
index 5130548..bf90a9f 100644
--- a/Platforms/ARM/VExpress/AcpiTables/Madt.aslc
+++ b/Platforms/ARM/VExpress/AcpiTables/Madt.aslc
@@ -49,37 +49,37 @@ FVP_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
   },

   {

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        0, 0, GET_MPID(0, 0), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        0, 0, GET_MPID(0, 0), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        1, 1, GET_MPID(0, 1),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        1, 1, GET_MPID(0, 1),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        2, 2, GET_MPID(0, 2),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        2, 2, GET_MPID(0, 2),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        3, 3, GET_MPID(0, 3),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        3, 3, GET_MPID(0, 3),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        4, 4, GET_MPID(1, 0),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        4, 4, GET_MPID(1, 0),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        5, 5, GET_MPID(1, 1),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        5, 5, GET_MPID(1, 1),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        6, 6, GET_MPID(1, 2),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        6, 6, GET_MPID(1, 2),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(

-        7, 7, GET_MPID(1, 3),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet32 (PcdGicInterruptInterfaceBase),

+        7, 7, GET_MPID(1, 3),  EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),

         0x2C02F000, 0x2C010000, 0x19, 0, 0),

   },

-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0, 3),

+  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 3),

   /* GIC Redistributor */

   {

     EFI_ACPI_6_1_GICR,                         // UINT8 Type

     sizeof(EFI_ACPI_6_1_GICR_STRUCTURE),       // UINT8 Length

     EFI_ACPI_RESERVED_WORD,                    // UINT16 Reserved

-    FixedPcdGet32 (PcdGicRedistributorsBase),  // UINT64 DiscoveryRangeBaseAddress

+    FixedPcdGet64 (PcdGicRedistributorsBase),  // UINT64 DiscoveryRangeBaseAddress

     0x00200000,                                // UINT32 DiscoveryRangeLength

   }

 };