tests: fix testcases for cortex-m0+ platforms

Change-Id: Idf6f5e38354aa5f1801ec0c0db63a4e19243918c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>

5 files changed, 22 insertions, 10 deletions

diff --git a/tests/crypto/test_mbedtls/testcase.ini b/tests/crypto/test_mbedtls/testcase.ini
index 0b34df948..f25742db7 100644
--- a/tests/crypto/test_mbedtls/testcase.ini
+++ b/tests/crypto/test_mbedtls/testcase.ini
@@ -1,6 +1,12 @@
 [test]
 tags = crypto mbedtls
-# insufficient flash space on these devices
-platform_exclude = qemu_nios2 quark_d2000_crb olimexino_stm32 nucleo_f103rb
 build_only = false
 kernel = nano
+filter =  ( CONFIG_SRAM_SIZE > 32 or CONFIG_DCCM_SIZE > 32 or
+	    CONFIG_RAM_SIZE > 32 )
+
+[test_nios]
+tags = crypto mbedtls
+build_only = false
+kernel = nano
+arch_whitelist = nios2
diff --git a/tests/kernel/test_arm_m3_irq_vector_table/src/main.c b/tests/kernel/test_arm_m3_irq_vector_table/src/main.c
index a34ee7b03..573d961d8 100644
--- a/tests/kernel/test_arm_m3_irq_vector_table/src/main.c
+++ b/tests/kernel/test_arm_m3_irq_vector_table/src/main.c
@@ -25,8 +25,8 @@ semaphores.
 The ISRs are installed at build time, directly in the vector table.
  */
 
-#if !defined(CONFIG_CPU_CORTEX_M3_M4)
-  #error project can only run on Cortex-M3/M4
+#if !defined(CONFIG_CPU_CORTEX_M)
+  #error project can only run on Cortex-M
 #endif
 
 #include <arch/cpu.h>
diff --git a/tests/kernel/test_arm_m3_irq_vector_table/testcase.ini b/tests/kernel/test_arm_m3_irq_vector_table/testcase.ini
index 3c03b778f..f6e3387b8 100644
--- a/tests/kernel/test_arm_m3_irq_vector_table/testcase.ini
+++ b/tests/kernel/test_arm_m3_irq_vector_table/testcase.ini
@@ -1,4 +1,4 @@
 [test]
 tags = core bat_commit unified_capable
-arch_whitelist = arm
+filter = CONFIG_CPU_CORTEX_M3_M4
 
diff --git a/tests/kernel/test_context/src/context.c b/tests/kernel/test_context/src/context.c
index 688a64243..a6522e44c 100644
--- a/tests/kernel/test_context/src/context.c
+++ b/tests/kernel/test_context/src/context.c
@@ -35,9 +35,9 @@ This module tests the following CPU and thread related routines:
 
 /*
  * Include board.h from platform to get IRQ number.
- * NOTE: Cortex-M3/M4 does not need IRQ numbers
+ * NOTE: Cortex-M does not need IRQ numbers
  */
-#if !defined(CONFIG_CPU_CORTEX_M3_M4)
+#if !defined(CONFIG_CPU_CORTEX_M)
   #include <board.h>
 #endif
 
@@ -66,9 +66,9 @@ This module tests the following CPU and thread related routines:
   #define TICK_IRQ TIMER_0_IRQ
 #elif defined(CONFIG_ARCV2_TIMER)
   #define TICK_IRQ IRQ_TIMER0
-#elif defined(CONFIG_CPU_CORTEX_M3_M4)
+#elif defined(CONFIG_CPU_CORTEX_M)
 /*
- * The Cortex-M3/M4 use the SYSTICK exception for the system timer, which is
+ * The Cortex-M use the SYSTICK exception for the system timer, which is
  * not considered an IRQ by the irq_enable/Disable APIs.
  */
 #else
diff --git a/tests/kernel/test_pool/testcase.ini b/tests/kernel/test_pool/testcase.ini
index 35d5b9133..e559faacc 100644
--- a/tests/kernel/test_pool/testcase.ini
+++ b/tests/kernel/test_pool/testcase.ini
@@ -1,4 +1,10 @@
 [test]
 tags = bat_commit core unified_capable
 kernel = micro
-platform_exclude = olimexino_stm32 nucleo_f103rb
+filter = ( CONFIG_SRAM_SIZE > 32 or CONFIG_DCCM_SIZE > 32 or
+	   CONFIG_RAM_SIZE > 32 )
+
+[test_nios2]
+tags = bat_commit core unified_capable
+kernel = micro
+arch_whitelist = nios2