diff options
author | Kumar Gala <kumar.gala@linaro.org> | 2017-01-25 09:12:00 -0600 |
---|---|---|
committer | Kumar Gala <kumar.gala@linaro.org> | 2017-01-30 11:02:38 -0600 |
commit | f16cefea9f4450fab7159d32f9df4d6990dd260a (patch) | |
tree | 277ea630338d500705c26d8389bd2e5ecdda61f1 | |
parent | 2d881d65391e9c8b29016ebeb89efb761abd9f83 (diff) |
arm: refactor clearing of exception faults to common code
A number of SoCs clear out the Mem/Bus/Usage and Hard Fault exceptions
during init. Lets refactor that into a common function so we don't have
to keep duplicating it over and over.
Change-Id: Ida908a9092db37447abcf3c9872f36937982f729
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
-rw-r--r-- | arch/arm/include/cortex_m/exc.h | 22 | ||||
-rw-r--r-- | arch/arm/soc/atmel_sam3/soc.c | 8 | ||||
-rw-r--r-- | arch/arm/soc/nordic_nrf5/nrf52/soc.c | 8 | ||||
-rw-r--r-- | arch/arm/soc/nxp_kinetis/k6x/soc.c | 9 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f1/soc.c | 8 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f3/soc.c | 8 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32f4/soc.c | 8 | ||||
-rw-r--r-- | arch/arm/soc/st_stm32/stm32l4/soc.c | 8 |
8 files changed, 36 insertions, 43 deletions
diff --git a/arch/arm/include/cortex_m/exc.h b/arch/arm/include/cortex_m/exc.h index c5eb8a554..dff2f845e 100644 --- a/arch/arm/include/cortex_m/exc.h +++ b/arch/arm/include/cortex_m/exc.h @@ -90,6 +90,28 @@ static ALWAYS_INLINE void _ExcSetup(void) #endif } +/** + * @brief Clear Fault exceptions + * + * Clear out exceptions for Mem, Bus, Usage and Hard Faults + * + * @return N/A + */ +static ALWAYS_INLINE void _ClearFaults(void) +{ +#if defined(CONFIG_ARMV6_M) +#elif defined(CONFIG_ARMV7_M) + /* Reset all faults */ + _ScbMemFaultAllFaultsReset(); + _ScbBusFaultAllFaultsReset(); + _ScbUsageFaultAllFaultsReset(); + + _ScbHardFaultAllFaultsReset(); +#else +#error Unknown ARM architecture +#endif /* CONFIG_ARMV6_M */ +} + #endif /* _ASMLANGUAGE */ #ifdef __cplusplus diff --git a/arch/arm/soc/atmel_sam3/soc.c b/arch/arm/soc/atmel_sam3/soc.c index 23f2bbfff..ef94651d5 100644 --- a/arch/arm/soc/atmel_sam3/soc.c +++ b/arch/arm/soc/atmel_sam3/soc.c @@ -19,6 +19,7 @@ #include <soc.h> #include <arch/cpu.h> +#include <cortex_m/exc.h> /** * @brief Setup various clock on SoC. @@ -162,12 +163,7 @@ static int atmel_sam3_init(struct device *arg) __EEFC0->fmr = 0x00000400; __EEFC1->fmr = 0x00000400; - /* Clear all faults */ - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Setup master clock */ clock_init(); diff --git a/arch/arm/soc/nordic_nrf5/nrf52/soc.c b/arch/arm/soc/nordic_nrf5/nrf52/soc.c index 1ad36efc7..2cd507324 100644 --- a/arch/arm/soc/nordic_nrf5/nrf52/soc.c +++ b/arch/arm/soc/nordic_nrf5/nrf52/soc.c @@ -16,6 +16,7 @@ #include <device.h> #include <init.h> #include <soc.h> +#include <cortex_m/exc.h> #ifdef CONFIG_RUNTIME_NMI extern void _NmiInit(void); @@ -377,12 +378,7 @@ static int nordicsemi_nrf52_init(struct device *arg) } #endif - /* Reset all faults */ - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Setup master clock */ clock_init(); diff --git a/arch/arm/soc/nxp_kinetis/k6x/soc.c b/arch/arm/soc/nxp_kinetis/k6x/soc.c index 65a5518c1..7b861d417 100644 --- a/arch/arm/soc/nxp_kinetis/k6x/soc.c +++ b/arch/arm/soc/nxp_kinetis/k6x/soc.c @@ -22,6 +22,7 @@ #include <fsl_common.h> #include <fsl_clock.h> #include <arch/cpu.h> +#include <cortex_m/exc.h> #define PLLFLLSEL_MCGFLLCLK (0) #define PLLFLLSEL_MCGPLLCLK (1) @@ -171,13 +172,7 @@ static int fsl_frdm_k64f_init(struct device *arg) temp_reg |= MPU_CESR_SPERR_MASK; MPU->CESR = temp_reg; - /* clear all faults */ - - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Initialize PLL/system clock to 120 MHz */ clkInit(); diff --git a/arch/arm/soc/st_stm32/stm32f1/soc.c b/arch/arm/soc/st_stm32/stm32f1/soc.c index 7b368e616..db7ca5bec 100644 --- a/arch/arm/soc/st_stm32/stm32f1/soc.c +++ b/arch/arm/soc/st_stm32/stm32f1/soc.c @@ -14,6 +14,7 @@ #include <init.h> #include <soc.h> #include <arch/cpu.h> +#include <cortex_m/exc.h> /** * @brief Perform basic hardware initialization at boot. @@ -31,12 +32,7 @@ static int stm32f1_init(struct device *arg) key = irq_lock(); - /* Clear all faults */ - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Install default handler that simply resets the CPU * if configured in the kernel, NOP otherwise diff --git a/arch/arm/soc/st_stm32/stm32f3/soc.c b/arch/arm/soc/st_stm32/stm32f3/soc.c index eefb6827c..27ebea9a4 100644 --- a/arch/arm/soc/st_stm32/stm32f3/soc.c +++ b/arch/arm/soc/st_stm32/stm32f3/soc.c @@ -14,6 +14,7 @@ #include <init.h> #include <soc.h> #include <arch/cpu.h> +#include <cortex_m/exc.h> /** * @brief Perform basic hardware initialization at boot. @@ -31,12 +32,7 @@ static int stm32f3_init(struct device *arg) key = irq_lock(); - /* Clear all faults */ - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Install default handler that simply resets the CPU * if configured in the kernel, NOP otherwise diff --git a/arch/arm/soc/st_stm32/stm32f4/soc.c b/arch/arm/soc/st_stm32/stm32f4/soc.c index 1b0f82177..3857992a3 100644 --- a/arch/arm/soc/st_stm32/stm32f4/soc.c +++ b/arch/arm/soc/st_stm32/stm32f4/soc.c @@ -15,6 +15,7 @@ #include <init.h> #include <soc.h> #include <arch/cpu.h> +#include <cortex_m/exc.h> /** * @brief Perform basic hardware initialization at boot. @@ -32,12 +33,7 @@ static int st_stm32f4_init(struct device *arg) key = irq_lock(); - /* Clear all faults */ - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Install default handler that simply resets the CPU * if configured in the kernel, NOP otherwise diff --git a/arch/arm/soc/st_stm32/stm32l4/soc.c b/arch/arm/soc/st_stm32/stm32l4/soc.c index 478faa8b8..f3498bdce 100644 --- a/arch/arm/soc/st_stm32/stm32l4/soc.c +++ b/arch/arm/soc/st_stm32/stm32l4/soc.c @@ -15,6 +15,7 @@ #include <init.h> #include <soc.h> #include <arch/cpu.h> +#include <cortex_m/exc.h> /** * @brief Perform basic hardware initialization at boot. @@ -32,12 +33,7 @@ static int stm32l4_init(struct device *arg) key = irq_lock(); - /* Clear all faults */ - _ScbMemFaultAllFaultsReset(); - _ScbBusFaultAllFaultsReset(); - _ScbUsageFaultAllFaultsReset(); - - _ScbHardFaultAllFaultsReset(); + _ClearFaults(); /* Install default handler that simply resets the CPU * if configured in the kernel, NOP otherwise |