diff options
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/combine.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/hppa/shadd-2.c | 49 |
4 files changed, 61 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c02cdadc7de..f4012b79536 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-05-21 Jeff Law <law@redhat.com> + + * combine.c (find_split_point): Handle ASHIFT like MULT to encourage + multiply-accumulate/shift-add insn generation. + 2015-05-21 Oleg Endo <olegendo@gcc.gnu.org> PR target/54236 diff --git a/gcc/combine.c b/gcc/combine.c index a90849ed0e9..8c527a74587 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -5145,7 +5145,9 @@ find_split_point (rtx *loc, rtx_insn *insn, bool set_src) /* Split at a multiply-accumulate instruction. However if this is the SET_SRC, we likely do not have such an instruction and it's worthless to try this split. */ - if (!set_src && GET_CODE (XEXP (x, 0)) == MULT) + if (!set_src + && (GET_CODE (XEXP (x, 0)) == MULT + || GET_CODE (XEXP (x, 0)) == ASHIFT)) return loc; default: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dd6c236d906..283644cdba2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-05-21 Jeff Law <law@redhat.com> + + * gcc.target/hppa/shadd-2.c: New test. + 2015-05-21 Oleg Endo <olegendo@gcc.gnu.org> PR target/54236 diff --git a/gcc/testsuite/gcc.target/hppa/shadd-2.c b/gcc/testsuite/gcc.target/hppa/shadd-2.c new file mode 100644 index 00000000000..34708e51597 --- /dev/null +++ b/gcc/testsuite/gcc.target/hppa/shadd-2.c @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times "sh.add" 2 } } */ + +typedef struct rtx_def *rtx; +typedef const struct rtx_def *const_rtx; +enum machine_mode +{ + VOIDmode, BLKmode, CCmode, CCGCmode, CCGOCmode, CCNOmode, CCAmode, CCCmode, + CCOmode, CCSmode, CCZmode, CCFPmode, CCFPUmode, BImode, QImode, HImode, + SImode, DImode, TImode, OImode, QQmode, HQmode, SQmode, DQmode, TQmode, + UQQmode, UHQmode, USQmode, UDQmode, UTQmode, HAmode, SAmode, DAmode, + TAmode, UHAmode, USAmode, UDAmode, UTAmode, SFmode, DFmode, XFmode, + TFmode, SDmode, DDmode, TDmode, CQImode, CHImode, CSImode, CDImode, + CTImode, COImode, SCmode, DCmode, XCmode, TCmode, V2QImode, V4QImode, + V2HImode, V1SImode, V8QImode, V4HImode, V2SImode, V1DImode, V16QImode, + V8HImode, V4SImode, V2DImode, V1TImode, V32QImode, V16HImode, V8SImode, + V4DImode, V2TImode, V64QImode, V32HImode, V16SImode, V8DImode, V4TImode, + V2SFmode, V4SFmode, V2DFmode, V8SFmode, V4DFmode, V2TFmode, V16SFmode, + V8DFmode, V4TFmode, MAX_MACHINE_MODE, NUM_MACHINE_MODES = MAX_MACHINE_MODE +}; +struct rtx_def +{ + __extension__ enum machine_mode mode:8; +}; +struct target_regs +{ + unsigned char x_hard_regno_nregs[53][MAX_MACHINE_MODE]; +}; +extern void oof (void); +extern int rhs_regno (rtx); + +extern struct target_regs default_target_regs; +__inline__ unsigned int +end_hard_regno (enum machine_mode mode, unsigned int regno) +{ + return regno + + ((&default_target_regs)->x_hard_regno_nregs)[regno][(int) mode]; +} + +void +note_btr_set (rtx dest, const_rtx set + __attribute__ ((__unused__)), void *data) +{ + int regno, end_regno; + end_regno = end_hard_regno (((dest)->mode), (rhs_regno (dest))); + for (; regno < end_regno; regno++) + oof (); +} |