diff options
author | rearnsha <> | 2012-02-28 14:04:57 +0000 |
---|---|---|
committer | rearnsha <> | 2012-02-28 14:04:57 +0000 |
commit | fadc2e4f2ca89e8affb1b78f319d0144d831f544 (patch) | |
tree | 6850ac067217ad8d4071a06ca9286db8f4a925b0 /gcc | |
parent | 12f2562756cb648f3568889822ecb9d570031c9d (diff) |
2012-02-28 Richard Earnshaw <rearnsha@arm.com>
* arm.c (aapcs_vfp_is_call_or_return_candidate): Only use the machine
mode if there is no type information available.
2012-02-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* gcc.target/arm/vfp1.c (dg_do run): Run on all eabi variants.
* gcc.target/arm/vfp2.c: Likewise.
* gcc.target/arm/vfp3.c: Likewise.
* gcc.target/arm/vfp4.c: Likewise.
* gcc.target/arm/vfp5.c: Likewise.
* gcc.target/arm/vfp6.c: Likewise.
* gcc.target/arm/vfp7.c: Likewise.
* gcc.target/arm/vfp8.c: Likewise.
* gcc.target/arm/vfp9.c: Likewise.
* gcc.target/arm/vfp10.c: Likewise.
* gcc.target/arm/vfp11.c: Likewise.
* gcc.target/arm/vfp12.c: Likewise.
* gcc.target/arm/vfp13.c: Likewise.
* gcc.target/arm/vfp14.c: Likewise.
* gcc.target/arm/vfp15.c: Likewise.
* gcc.target/arm/vfp16.c: Likewise.
* gcc.target/arm/vfp17.c: Likewise.
* gcc.target/arm/neon-constants.h: New file.
* gcc.target/arm/neon-vect1.c: New test.
* gcc.target/arm/neon-vect2.c: New test.
* gcc.target/arm/neon-vect3.c: New test.
* gcc.target/arm/neon-vect4.c: New test.
* gcc.target/arm/neon-vect5.c: New test.
* gcc.target/arm/neon-vect6.c: New test.
* gcc.target/arm/neon-vect7.c: New test.
* gcc.target/arm/neon-vect8.c: New test.
Diffstat (limited to 'gcc')
30 files changed, 328 insertions, 42 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ac76ef869bd..c4852725c54 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-02-28 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (aapcs_vfp_is_call_or_return_candidate): Only use the machine + mode if there is no type information available. + 2012-02-28 Thomas Koenig <tkoenig@gcc.gnu.org> PR tree-optimization/53207 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b58877bfaa0..6923d8100b6 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -4264,6 +4264,11 @@ use_vfp_abi (enum arm_pcs pcs_variant, bool is_double) (TARGET_VFP_DOUBLE || !is_double)); } +/* Return true if an argument whose type is TYPE, or mode is MODE, is + suitable for passing or returning in VFP registers for the PCS + variant selected. If it is, then *BASE_MODE is updated to contain + a machine mode describing each element of the argument's type and + *COUNT to hold the number of such elements. */ static bool aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, enum machine_mode mode, const_tree type, @@ -4271,9 +4276,20 @@ aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, { enum machine_mode new_mode = VOIDmode; - if (GET_MODE_CLASS (mode) == MODE_FLOAT - || GET_MODE_CLASS (mode) == MODE_VECTOR_INT - || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) + /* If we have the type information, prefer that to working things + out from the mode. */ + if (type) + { + int ag_count = aapcs_vfp_sub_candidate (type, &new_mode); + + if (ag_count > 0 && ag_count <= 4) + *count = ag_count; + else + return false; + } + else if (GET_MODE_CLASS (mode) == MODE_FLOAT + || GET_MODE_CLASS (mode) == MODE_VECTOR_INT + || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) { *count = 1; new_mode = mode; @@ -4283,15 +4299,6 @@ aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, *count = 2; new_mode = (mode == DCmode ? DFmode : SFmode); } - else if (type && (mode == BLKmode || TREE_CODE (type) == VECTOR_TYPE)) - { - int ag_count = aapcs_vfp_sub_candidate (type, &new_mode); - - if (ag_count > 0 && ag_count <= 4) - *count = ag_count; - else - return false; - } else return false; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7a3af5818da..09da73f681c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,32 @@ +2012-02-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * gcc.target/arm/vfp1.c (dg_do run): Run on all eabi variants. + * gcc.target/arm/vfp2.c: Likewise. + * gcc.target/arm/vfp3.c: Likewise. + * gcc.target/arm/vfp4.c: Likewise. + * gcc.target/arm/vfp5.c: Likewise. + * gcc.target/arm/vfp6.c: Likewise. + * gcc.target/arm/vfp7.c: Likewise. + * gcc.target/arm/vfp8.c: Likewise. + * gcc.target/arm/vfp9.c: Likewise. + * gcc.target/arm/vfp10.c: Likewise. + * gcc.target/arm/vfp11.c: Likewise. + * gcc.target/arm/vfp12.c: Likewise. + * gcc.target/arm/vfp13.c: Likewise. + * gcc.target/arm/vfp14.c: Likewise. + * gcc.target/arm/vfp15.c: Likewise. + * gcc.target/arm/vfp16.c: Likewise. + * gcc.target/arm/vfp17.c: Likewise. + * gcc.target/arm/neon-constants.h: New file. + * gcc.target/arm/neon-vect1.c: New test. + * gcc.target/arm/neon-vect2.c: New test. + * gcc.target/arm/neon-vect3.c: New test. + * gcc.target/arm/neon-vect4.c: New test. + * gcc.target/arm/neon-vect5.c: New test. + * gcc.target/arm/neon-vect6.c: New test. + * gcc.target/arm/neon-vect7.c: New test. + * gcc.target/arm/neon-vect8.c: New test. + 2012-02-28 Richard Guenther <rguenther@suse.de> PR tree-optimization/52402 diff --git a/gcc/testsuite/gcc.target/arm/aapcs/abitest.h b/gcc/testsuite/gcc.target/arm/aapcs/abitest.h index 7b7d0e24fac..06a92c3ec84 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/abitest.h +++ b/gcc/testsuite/gcc.target/arm/aapcs/abitest.h @@ -1,3 +1,4 @@ + #define IN_FRAMEWORK #ifdef VFP @@ -10,6 +11,13 @@ #define D6 48 #define D7 56 +#ifdef NEON +#define Q0 D0 +#define Q1 D2 +#define Q2 D4 +#define Q3 D6 +#endif + #define S0 64 #define S1 68 #define S2 72 @@ -27,23 +35,18 @@ #define S14 120 #define S15 124 -#define R0 128 -#define R1 132 -#define R2 136 -#define R3 140 - -#define STACK 144 - +#define CORE_REG_START 128 #else +#define CORE_REG_START 0 +#endif -#define R0 0 -#define R1 4 -#define R2 8 -#define R3 12 +#define R0 CORE_REG_START +#define R1 (R0 + 4) +#define R2 (R1 + 4) +#define R3 (R2 + 4) +#define STACK (R3 + 4) -#define STACK 16 -#endif extern void abort (void); diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h b/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h new file mode 100644 index 00000000000..08b75f7b1a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h @@ -0,0 +1,33 @@ + + +#include "arm_neon.h" + +const int32x4_t i32x4_constvec1 = { 1101, 1102, 1103, 1104}; +const int32x4_t i32x4_constvec2 = { 2101, 2102, 2103, 2104}; + +#define ELEM(INDEX) .val[INDEX] + +const int32x4x2_t i32x4x2_constvec1 = {ELEM(0) = {0xaddebccb,11,12,13}, + ELEM(1) = {14, 15, 16, 17} }; + +const int32x4x2_t i32x4x2_constvec2 = { ELEM(0) = {0xaadebcca,11,12,13}, + ELEM(1) = {140, 15, 16, 17}}; + +const int32x4x3_t i32x4x3_constvec1 = { ELEM(0) = {0xabbccdde,8, 9, 10}, + ELEM(1) = {0xabcccdde, 26, 27, 28}, + ELEM(2) = {0xaccccddf, 29, 30, 31}}; + +const int32x4x3_t i32x4x3_constvec2 = { ELEM(0) = {0xbccccdd0,8, 9, 10}, + ELEM(1) = {0xbdfe1000, 26, 27, 28}, + ELEM(2) = {0xaccccddf, 29, 30, 31}}; +const float32x4x2_t f32x4x2_constvec1 = + { ELEM(0) = { 7.101f, 0.201f, 0.301f, 0.401f} , + ELEM(1) = { 8.101f, 0.501f, 0.601f, 0.701f} }; + +const float32x4x2_t f32x4x2_constvec2 = + { ELEM(0) = { 11.99f , 11.21f, 1.27f, 8.74f}, + ELEM(1) = { 13.45f , 1.23f ,1.24f, 1.26f}}; + +const int32x2_t i32x2_constvec1 = { 1283, 1345 }; +const int32x2x2_t i32x2x2_constvec1 = { ELEM(0) = { 0xabcdefab, 32 }, + ELEM(1) = { 0xabcdefbc, 33 }}; diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect1.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect1.c new file mode 100644 index 00000000000..47ae2f65fae --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect1.c @@ -0,0 +1,27 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect1.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(int32x4_t, i32x4_constvec2, Q0) /* D0, D1 */ +ARG(float, 3.0f, S4) /* D2, Q1 */ +ARG(int32x4x2_t, i32x4x2_constvec1, Q2) /* Q2, Q3 - D4-D6 , s5-s12 */ +ARG(double, 12.0, D3) /* Backfill this particular argument. */ +ARG(int32x4x2_t, i32x4x2_constvec2, STACK) +ARG(float, 5.0f, STACK+sizeof(int32x4x2_t)) /* No backfill allowed. */ +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect2.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect2.c new file mode 100644 index 00000000000..f7b532a3be1 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect2.c @@ -0,0 +1,23 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect2.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(int32x4_t, i32x4_constvec2, Q0) /* D0, D1. */ +ARG(float, 3.0f, S4) /* D2, Q1 occupied. */ +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect3.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect3.c new file mode 100644 index 00000000000..e5426b0ec2b --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect3.c @@ -0,0 +1,26 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect3.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(int32x4_t, i32x4_constvec2, Q0) /* D0, D1 */ +ARG(float, 3.0f, S4) /* D2, Q1 */ +ARG(int32x4x2_t, i32x4x2_constvec1, Q2) /* Q2, Q3 - D4-D6 , s5-s12 */ +ARG(int32x4x2_t, i32x4x2_constvec2, STACK) +ARG(double, 11.0, STACK+sizeof(int32x4x2_t)) /* No backfill in D3. */ +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect4.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect4.c new file mode 100644 index 00000000000..96bd09c459f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect4.c @@ -0,0 +1,27 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect4.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(int32x4_t, i32x4_constvec2, Q0) /* D0, D1 */ +ARG(float, 3.0f, S4) /* D2, Q1 */ +ARG(int32x4x2_t, i32x4x2_constvec1, Q2) /* Q2, Q3 - D4-D6 , s5-s12 */ +ARG(double, 12.0, D3) /* Backfill this particular argument. */ +ARG(float, 5.0f, S5) /* Backfill in S5. */ +ARG(int32x4x2_t, i32x4x2_constvec2, STACK) +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect5.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect5.c new file mode 100644 index 00000000000..59e58c96c5e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect5.c @@ -0,0 +1,28 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect5.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(int32x4_t, i32x4_constvec2, Q0) /* D0, D1 */ +ARG(float, 3.0f, S4) /* D2, Q1 */ +ARG(float32x4x2_t, f32x4x2_constvec1, Q2) /* Q2, Q3 - D4-D6 , s5-s12 */ +ARG(double, 12.0, D3) /* Backfill this particular argument. */ +ARG(int32x4x2_t, i32x4x2_constvec2, STACK) +ARG(float, 5.0f, STACK+sizeof(int32x4x2_t)) /* No backfill allowed. */ +LAST_ARG(int, 3, R0) + +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect6.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect6.c new file mode 100644 index 00000000000..fcb3998821a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect6.c @@ -0,0 +1,24 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect6.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(int32x4_t, i32x4_constvec2, Q0) /* D0, D1 */ +ARG(int32x4x3_t, i32x4x3_constvec1, Q1) /* Q1, Q2, Q3 */ +ARG(int32x4x3_t, i32x4x3_constvec2, STACK) +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect7.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect7.c new file mode 100644 index 00000000000..f8d1d073007 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect7.c @@ -0,0 +1,27 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect7.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(float, 24.3f, S0) /* S0 , D0, Q0 */ +ARG(int32x4x3_t, i32x4x3_constvec1, Q1) /* Q1, Q2, Q3 */ +ARG(double, 25.6, D1) +ARG(float, 12.67f, S1) +ARG(int32x4x3_t, i32x4x3_constvec2, STACK) +ARG(double, 2.47, STACK+sizeof(int32x4x3_t)) +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect8.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect8.c new file mode 100644 index 00000000000..f2c295d84fb --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect8.c @@ -0,0 +1,27 @@ +/* Test AAPCS layout (VFP variant for Neon types) */ + +/* { dg-do run { target arm*-*-*eabi* } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-add-options arm_neon } */ + + +#ifndef IN_FRAMEWORK +#define VFP +#define NEON +#define TESTFILE "neon-vect8.c" +#include "neon-constants.h" + + +#include "abitest.h" +#else + +ARG(float, 24.3f, S0) /* S0 , D0, Q0 */ +ARG(int32x2_t, i32x2_constvec1, D1) /* D1 */ +ARG(double, 25.6, D2) +ARG(float, 12.67f, S1) +ARG(int32x4x3_t, i32x4x3_constvec2, STACK) +ARG(double, 2.47, STACK+sizeof(int32x4x3_t)) +LAST_ARG(int, 3, R0) +#endif diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c index 380a3244dd4..9fb926dbdfc 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp10.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp10.c index 58561aac9fc..c3a1b39a949 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp10.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp10.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp11.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp11.c index 2c143bafb06..a496a3ed5bb 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp11.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp11.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp12.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp12.c index 7b6b4cd54aa..bbfa3df9082 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp12.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp12.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp13.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp13.c index ca0c5be7c3a..a46361c0904 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp13.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp13.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp14.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp14.c index b5131d7fcff..43c19f2dd2c 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp14.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp14.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp15.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp15.c index d5a75b5b8ff..c98ca38101d 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp15.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp15.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp16.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp16.c index 9815994ef8b..956bc0ab5d8 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp16.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp16.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp17.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp17.c index d02160c860b..9044ec221fc 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp17.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp17.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp2.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp2.c index a2db349e4a2..bfe90675b23 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp2.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp2.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp3.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp3.c index 807292b5721..0e645d71109 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp3.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp3.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp4.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp4.c index 8bb2a5678b9..46dc4b98a7d 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp4.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp4.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp5.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp5.c index 0adc17fde11..216d98ea8e3 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp5.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp5.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp6.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp6.c index 6d8df0d62ac..4d718da45d0 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp6.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp6.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp7.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp7.c index de4bdb4c421..3e57e45c7de 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp7.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp7.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp8.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp8.c index 7865844ebbc..e55006885c4 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp8.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp8.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp9.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp9.c index f9aa2960ca8..c2be6bf4b70 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp9.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp9.c @@ -1,6 +1,6 @@ /* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm*-*-eabi* } } */ +/* { dg-do run { target arm*-*-*eabi* } } */ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ |