diff options
author | Andrew Stubbs <ams@codesourcery.com> | 2012-03-28 14:24:58 +0100 |
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committer | Andrew Stubbs <ams@codesourcery.com> | 2012-03-28 14:24:58 +0100 |
commit | 9f438e9fd3f10b5b21a7d0204b1df99401086db5 (patch) | |
tree | c9a5070a086fe78f9055bd3744f7c0b1132bb95d /gcc | |
parent | 01682f89e57d03cd58b13f93666ca68379289b24 (diff) |
Rework attributes
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/arm/arm.md | 36 | ||||
-rw-r--r-- | gcc/config/arm/neon.md | 14 |
2 files changed, 23 insertions, 27 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 6c5d90214c6..ad5ae445ce0 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -196,7 +196,7 @@ ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without ; arm_arch6. This attribute is used to compute attribute "enabled", ; use type "any" to enable an alternative in all cases. -(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,onlya8,nota8" +(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,onlya8,neon_onlya8,nota8,neon_nota8" (const_string "any")) (define_attr "arch_enabled" "no,yes" @@ -235,8 +235,18 @@ (eq_attr "tune" "cortexa8")) (const_string "yes") + (and (eq_attr "arch" "neon_onlya8") + (eq_attr "tune" "cortexa8") + (match_test "TARGET_NEON")) + (const_string "yes") + (and (eq_attr "arch" "nota8") (not (eq_attr "tune" "cortexa8"))) + (const_string "yes") + + (and (eq_attr "arch" "neon_nota8") + (not (eq_attr "tune" "cortexa8")) + (match_test "TARGET_NEON")) (const_string "yes")] (const_string "no"))) @@ -4195,17 +4205,15 @@ "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)" "") -(define_expand "one_cmpldi2" - [(set (match_operand:DI 0 "s_register_operand" "") - (not:DI (match_operand:DI 1 "s_register_operand" "")))] +(define_insn_and_split "one_cmpldi2" + [(set (match_operand:DI 0 "s_register_operand" "=w,&r,&r,?w") + (not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))] "TARGET_32BIT" - "") - -(define_insn_and_split "*one_cmpldi2_internal" - [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") - (not:DI (match_operand:DI 1 "s_register_operand" "0,r")))] - "TARGET_32BIT && !TARGET_NEON" - "#" + "@ + vmvn\t%P0, %P1 + # + # + vmvn\t%P0, %P1" "TARGET_32BIT && reload_completed && arm_general_register_operand (operands[0], DImode)" [(set (match_dup 0) (not:SI (match_dup 1))) @@ -4217,8 +4225,10 @@ operands[3] = gen_highpart (SImode, operands[1]); operands[1] = gen_lowpart (SImode, operands[1]); }" - [(set_attr "length" "8") - (set_attr "predicable" "yes")] + [(set_attr "length" "*,8,8,*") + (set_attr "predicable" "yes") + (set_attr "neon_type" "neon_int_1,*,*,neon_int_1") + (set_attr "arch" "neon_nota8,*,*,neon_onlya8")] ) (define_expand "one_cmplsi2" diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 560109947da..a6c891dafd6 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -898,20 +898,6 @@ [(set_attr "neon_type" "neon_int_1")] ) -(define_insn "*one_cmpldi2_neon" - [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?w") - (not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))] - "TARGET_NEON" - "@ - vmvn\t%P0, %P1 - # - # - vmvn\t%P0, %P1" - [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1") - (set_attr "arch" "nota8,*,*,onlya8") - (set_attr "length" "*,8,8,*")] -) - (define_insn "abs<mode>2" [(set (match_operand:VDQW 0 "s_register_operand" "=w") (abs:VDQW (match_operand:VDQW 1 "s_register_operand" "w")))] |