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| author | Richard Sandiford <richard.sandiford@arm.com> | 2024-06-13 12:48:21 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2024-06-13 12:48:21 +0100 |
| commit | 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0 (patch) | |
| tree | b97e9211988dd560d55a7d3fdfeacd1ce24bf87d /gcc/testsuite | |
| parent | 3dac1049c1211e6d06c2536b86445a6334c3866d (diff) | |
aarch64: Fix invalid nested subregs [PR115464]
The testcase extracts one arm_neon.h vector from a pair (one subreg)
and then reinterprets the result as an SVE vector (another subreg).
Each subreg makes sense individually, but we can't fold them together
into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
but the interpretation of 32 bytes -> 16*N bytes depends on
whether N==1 or N>1.
Since the second subreg makes sense individually, simplify_subreg
should bail out rather than ICE on it. simplify_gen_subreg will
then do the same (because it already checks validate_subreg).
This leaves simplify_gen_subreg returning null, requiring the
caller to take appropriate action.
I think this is relatively likely to occur elsewhere, so the patch
adds a helper for forcing a subreg, allowing a temporary pseudo to
be created where necessary.
I'll follow up by using force_subreg in more places. This patch
is intended to be a minimal backportable fix for the PR.
gcc/
PR target/115464
* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
to fold two subregs together if their relationship isn't known
at compile time.
* explow.h (force_subreg): Declare.
* explow.cc (force_subreg): New function.
* config/aarch64/aarch64-sve-builtins-base.cc
(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
gcc/testsuite/
PR target/115464
* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c new file mode 100644 index 00000000000..d728d1325ed --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c @@ -0,0 +1,13 @@ +/* { dg-options "-O2" } */ + +#include <arm_neon.h> +#include <arm_sve.h> +#include <arm_neon_sve_bridge.h> + +svuint16_t +convolve4_4_x (uint16x8x2_t permute_tbl) +{ + return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); +} + +/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ |