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authorChristophe Lyon <christophe.lyon@linaro.org>2015-06-03 20:42:52 +0200
committerChristophe Lyon <christophe.lyon@linaro.org>2015-06-12 16:04:51 +0200
commit395de8f1cce76d283376c8be2e323aa03dbef4c4 (patch)
treeeeae3b088c9ea7c1e6541d14d6b31802db5c3ea1
parent995281d383768adf62bde791d30eabd4bcd4601c (diff)
2015-06-03 Christophe Lyon <christophe.lyon@linaro.org>
gcc/ Backport from trunk r222263. 2015-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.md (*<NLOGICAL:optab>_one_cmplsidi3_ze): New pattern. (*xor_one_cmplsidi3_ze): Likewise. Change-Id: I24aa1096d2a53aa526add61bad86e5c57df8a12b
-rw-r--r--gcc/config/aarch64/aarch64.md20
1 files changed, 20 insertions, 0 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 534a862b4ad..429c5bac000 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3058,6 +3058,26 @@
(set_attr "simd" "*,yes")]
)
+(define_insn "*<NLOGICAL:optab>_one_cmplsidi3_ze"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (zero_extend:DI
+ (NLOGICAL:SI (not:SI (match_operand:SI 1 "register_operand" "r"))
+ (match_operand:SI 2 "register_operand" "r"))))]
+ ""
+ "<NLOGICAL:nlogical>\\t%w0, %w2, %w1"
+ [(set_attr "type" "logic_reg")]
+)
+
+(define_insn "*xor_one_cmplsidi3_ze"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (zero_extend:DI
+ (not:SI (xor:SI (match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")))))]
+ ""
+ "eon\\t%w0, %w1, %w2"
+ [(set_attr "type" "logic_reg")]
+)
+
;; (xor (not a) b) is simplify_rtx-ed down to (not (xor a b)).
;; eon does not operate on SIMD registers so the vector variant must be split.
(define_insn_and_split "*xor_one_cmpl<mode>3"