diff options
| author | joseph <joseph@7b3dc134-2b1b-0410-93df-9e9f96275f8d> | 2013-01-10 00:28:48 +0000 |
|---|---|---|
| committer | joseph <joseph@7b3dc134-2b1b-0410-93df-9e9f96275f8d> | 2013-01-10 00:28:48 +0000 |
| commit | 00ed3326c2fac75592e173e9d731452e9bb769ff (patch) | |
| tree | 749aa90fd85da4971d09bc7cb69d79ac7e1ea580 /libc/sysdeps/powerpc/powerpc32/cell/memcpy.S | |
| parent | 28c5710e0d8071ca674ea390549c1b9e969ccde2 (diff) | |
Merge changes between r22062 and r22176 from /fsf/trunk.
git-svn-id: svn://svn.eglibc.org/trunk@22177 7b3dc134-2b1b-0410-93df-9e9f96275f8d
Diffstat (limited to 'libc/sysdeps/powerpc/powerpc32/cell/memcpy.S')
| -rw-r--r-- | libc/sysdeps/powerpc/powerpc32/cell/memcpy.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/libc/sysdeps/powerpc/powerpc32/cell/memcpy.S b/libc/sysdeps/powerpc/powerpc32/cell/memcpy.S index a25547feb..6d7d4ce5d 100644 --- a/libc/sysdeps/powerpc/powerpc32/cell/memcpy.S +++ b/libc/sysdeps/powerpc/powerpc32/cell/memcpy.S @@ -1,5 +1,5 @@ /* Optimized memcpy implementation for CELL BE PowerPC. - Copyright (C) 2010 Free Software Foundation, Inc. + Copyright (C) 2010-2013 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -34,7 +34,7 @@ * latency to memory is >400 clocks * To improve copy performance we need to prefetch source data * far ahead to hide this latency - * For best performance instructionforms ending in "." like "andi." + * For best performance instruction forms ending in "." like "andi." * should be avoided as the are implemented in microcode on CELL. * The below code is loop unrolled for the CELL cache line of 128 bytes */ @@ -146,7 +146,7 @@ EALIGN (BP_SYM (memcpy), 5, 0) lfd fp9, 0x08(r4) dcbz r11,r6 lfd fp10, 0x10(r4) /* 4 register stride copy is optimal */ - lfd fp11, 0x18(r4) /* to hide 1st level cache lantency. */ + lfd fp11, 0x18(r4) /* to hide 1st level cache latency. */ lfd fp12, 0x20(r4) stfd fp9, 0x08(r6) stfd fp10, 0x10(r6) |