summaryrefslogtreecommitdiff
path: root/target/loongarch/cpu.h
diff options
context:
space:
mode:
authorSong Gao <gaosong@loongson.cn>2022-06-24 11:10:47 +0800
committerRichard Henderson <richard.henderson@linaro.org>2022-07-04 11:08:58 +0530
commit0093b9a5eeee6304fbd6e4f5be6b47820c4d55e3 (patch)
tree74a5b929aabcaad5f5081f03805ec8a23a95c6b1 /target/loongarch/cpu.h
parent9bc92b501363a5bad67ca92cf0f7256b20c401e5 (diff)
target/loongarch: Adjust functions and structure to support user-mode
Some functions and member of the structure are different with softmmu-mode So we need adjust them to support user-mode. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-12-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch/cpu.h')
-rw-r--r--target/loongarch/cpu.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 4b4fbcdc71..d141ec9b5d 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -301,6 +301,7 @@ typedef struct CPUArchState {
uint64_t CSR_DERA;
uint64_t CSR_DSAVE;
+#ifndef CONFIG_USER_ONLY
LoongArchTLB tlb[LOONGARCH_TLB_MAX];
AddressSpace address_space_iocsr;
@@ -308,6 +309,7 @@ typedef struct CPUArchState {
MemoryRegion iocsr_mem;
bool load_elf;
uint64_t elf_address;
+#endif
} CPULoongArchState;
/**
@@ -358,12 +360,16 @@ struct LoongArchCPUClass {
static inline int cpu_mmu_index(CPULoongArchState *env, bool ifetch)
{
+#ifdef CONFIG_USER_ONLY
+ return MMU_USER_IDX;
+#else
uint8_t pg = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PG);
if (!pg) {
return MMU_DA_IDX;
}
return FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PLV);
+#endif
}
static inline void cpu_get_tb_cpu_state(CPULoongArchState *env,