diff options
| author | Jan Vesely <jano.vesely@gmail.com> | 2012-04-03 17:50:52 -0400 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-04-05 15:41:41 +0000 |
| commit | 638d057783f10fb492a66fcb9766cc2e8599b5a1 (patch) | |
| tree | 576085801a6a9a4f8609304be32ba654f417f819 | |
| parent | 454dfc4a245e2a1072be84f896b16e935bea3326 (diff) | |
omap_uart: Add revision property.
Set revision to values reported by beagleboard(-xm) hw.
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
| -rw-r--r-- | hw/omap3.c | 6 | ||||
| -rw-r--r-- | hw/omap_uart.c | 4 |
2 files changed, 9 insertions, 1 deletions
diff --git a/hw/omap3.c b/hw/omap3.c index b90b94003..7cd7c95f9 100644 --- a/hw/omap3.c +++ b/hw/omap3.c @@ -4061,6 +4061,8 @@ struct omap_mpu_state_s *omap3_mpu_init(MemoryRegion *sysmem, qemu_irq drqs[4]; int i; SysBusDevice *busdev; + /* values reported by beagleboard(-xm) hw */ + const unsigned uart_revision = model == omap3430 ? 0x46 : 0x52; if (model != omap3430 && model != omap3630) { hw_error("%s: invalid cpu model (%d)", __FUNCTION__, model); @@ -4203,6 +4205,7 @@ struct omap_mpu_state_s *omap3_mpu_init(MemoryRegion *sysmem, omap_clk_getrate(omap_findclk(s, "omap3_uart1_fclk")) / 16); qdev_prop_set_chr(s->uart[0], "chardev", chr_uart1); + qdev_prop_set_uint32(s->uart[0], "revision", uart_revision); qdev_init_nofail(s->uart[0]); busdev = sysbus_from_qdev(s->uart[0]); sysbus_connect_irq(busdev, 0, @@ -4219,6 +4222,7 @@ struct omap_mpu_state_s *omap3_mpu_init(MemoryRegion *sysmem, omap_clk_getrate(omap_findclk(s, "omap3_uart2_fclk")) / 16); qdev_prop_set_chr(s->uart[1], "chardev", chr_uart2); + qdev_prop_set_uint32(s->uart[1], "revision", uart_revision); qdev_init_nofail(s->uart[1]); busdev = sysbus_from_qdev(s->uart[1]); sysbus_connect_irq(busdev, 0, @@ -4235,6 +4239,7 @@ struct omap_mpu_state_s *omap3_mpu_init(MemoryRegion *sysmem, omap_clk_getrate(omap_findclk(s, "omap3_uart3_fclk")) / 16); qdev_prop_set_chr(s->uart[2], "chardev", chr_uart3); + qdev_prop_set_uint32(s->uart[2], "revision", uart_revision); qdev_init_nofail(s->uart[2]); busdev = sysbus_from_qdev(s->uart[2]); sysbus_connect_irq(busdev, 0, @@ -4253,6 +4258,7 @@ struct omap_mpu_state_s *omap3_mpu_init(MemoryRegion *sysmem, "omap3_uart4_fclk")) / 16); qdev_prop_set_chr(s->uart[3], "chardev", chr_uart4); + qdev_prop_set_uint32(s->uart[3], "revision", uart_revision); qdev_init_nofail(s->uart[3]); busdev = sysbus_from_qdev(s->uart[3]); sysbus_connect_irq(busdev, 0, diff --git a/hw/omap_uart.c b/hw/omap_uart.c index cd568b043..644fa04e9 100644 --- a/hw/omap_uart.c +++ b/hw/omap_uart.c @@ -46,6 +46,7 @@ struct omap_uart_s { const MemoryRegionOps *serial_ops; uint32_t mmio_size; uint32_t baudrate; + uint32_t revision; qemu_irq tx_drq; qemu_irq rx_drq; @@ -165,7 +166,7 @@ static uint64_t omap_uart_read(void *opaque, target_phys_addr_t addr, case 0x4C: /* OSC_12M_SEL (OMAP1) */ return s->clksel; case 0x50: /* MVR */ - return 0x30; + return s->revision; case 0x54: /* SYSC (OMAP2) */ return s->syscontrol; case 0x58: /* SYSS (OMAP2) */ @@ -326,6 +327,7 @@ static int omap_uart_init(SysBusDevice *busdev) } static Property omap_uart_properties[] = { + DEFINE_PROP_UINT32("revision", struct omap_uart_s, revision, 0x30), DEFINE_PROP_UINT32("mmio_size", struct omap_uart_s, mmio_size, 0x400), DEFINE_PROP_UINT32("baudrate", struct omap_uart_s, baudrate, 0), DEFINE_PROP_CHR("chardev", struct omap_uart_s, chr), |