diff options
Diffstat (limited to 'qemu_v8_scmi.dts')
-rw-r--r-- | qemu_v8_scmi.dts | 269 |
1 files changed, 266 insertions, 3 deletions
diff --git a/qemu_v8_scmi.dts b/qemu_v8_scmi.dts index 785264a..3d790b5 100644 --- a/qemu_v8_scmi.dts +++ b/qemu_v8_scmi.dts @@ -386,6 +386,264 @@ compatible = "cfi-flash"; }; + //SCMI devices + pm_test0 { + compatible = "test,pm-test"; + power-domains = <&scmi_devpd 0>; + }; + + pm_test1 { + compatible = "test,pm-test"; + power-domains = <&scmi_devpd 1>; + }; + + pm_test2 { + compatible = "test,pm-test"; + power-domains = <&scmi_devpd 2>; + }; + + pm_test3 { + compatible = "test,pm-test"; + power-domains = <&scmi_dvfs 2>; + }; + + pm_test4 { + compatible = "test,pm-test"; + power-domains = <&scmi_dvfs 2>; + }; + + //Generic PM domains and their OPP tables + opp_table_pd_perf0: opp-table-pd0 { + compatible = "operating-points-v2"; + + opp_pd_100: opp1 { + opp-level = <100>; + }; + + opp_pd_200: opp2 { + opp-level = <200>; + }; + }; + + opp_table_pd_perf1: opp-table-pd1 { + compatible = "operating-points-v2"; + opp-shared; + + opp_pd_50: opp3 { + opp-level = <50>; + }; + + opp_pd_150: opp4 { + opp-level = <150>; + }; + }; + + opp_table_pd_perf: opp-table-pd-perf { + compatible = "operating-points-v2"; + opp-shared; + + opp_pd_25: opp5 { + opp-level = <25>; + }; + + opp_pd_125: opp6 { + opp-level = <125>; + }; + + opp_pd_225: opp7 { + opp-level = <225>; + }; + }; + + domain_perf { + compatible = "test,pm-domain-test"; + + pd_perf0: pd-perf0 { + #power-domain-cells = <0>; + operating-points-v2 = <&opp_table_pd_perf0>; + }; + + pd_perf1: pd-perf1 { + #power-domain-cells = <0>; + operating-points-v2 = <&opp_table_pd_perf1>; + }; + + //Parent/child sharing opp-table + pd_perf_parent: pd-perf-parent { + #power-domain-cells = <0>; + operating-points-v2 = <&opp_table_pd_perf>; + }; + + pd_perf_child: pd-perf-child { + #power-domain-cells = <0>; + power-domains = <&pd_perf_parent>; + operating-points-v2 = <&opp_table_pd_perf>; + }; + }; + + domain_power { + compatible = "test,pm-domain-test"; + + pd_power0: pd-power0 { + #power-domain-cells = <0>; + }; + + pd_power1: pd-power1 { + #power-domain-cells = <0>; + }; + + pd_power2: pd-power2 { + #power-domain-cells = <0>; + }; + + pd_power3: pd-power3 { + #power-domain-cells = <0>; + }; + + //Parent is a perf domain + pd_power4: pd-power4 { + #power-domain-cells = <0>; + power-domains = <&pd_perf0>; + }; + + //Parent is a perf domain + pd_power5: pd-power5 { + #power-domain-cells = <0>; + power-domains = <&pd_perf0>; + }; + }; + + //PM devices and their OPP tables + opp_table_pm_test5: opp-table-pm5 { + compatible = "operating-points-v2"; + + opp5-100000 { + opp-hz = /bits/ 64 <133>; + required-opps = <&opp_pd_100>; + }; + + opp5-200000 { + opp-hz = /bits/ 64 <266>; + required-opps = <&opp_pd_200>; + }; + }; + + opp_table_pm_test6: opp-table-pm6 { + compatible = "operating-points-v2"; + + opp6-100000 { + opp-hz = /bits/ 64 <133>; + required-opps = <&opp_pd_100>, <&opp_pd_50>; + }; + + opp6-200000 { + opp-hz = /bits/ 64 <266>; + required-opps = <&opp_pd_200>, <&opp_pd_150>; //perf0,perf1 + }; + }; + + opp_table_pm_test7: opp-table-pm7 { + compatible = "operating-points-v2"; + + opp7-25 { + opp-hz = /bits/ 64 <133>; + opp-level = <25>; + }; + + opp7-125 { + opp-hz = /bits/ 64 <266>; + opp-level = <125>; + }; + + opp7-225 { + opp-hz = /bits/ 64 <333>; + opp-level = <225>; + }; + }; + + opp_table_pm_test8: opp-table-pm8 { + compatible = "operating-points-v2"; + + opp8-100000 { + opp-hz = /bits/ 64 <133>; + required-opps = <&opp_pd_100>; + }; + + opp8-200000 { + opp-hz = /bits/ 64 <266>; + required-opps = <&opp_pd_200>; + }; + }; + + opp_table_pm_test10: opp-table-pm10 { + compatible = "operating-points-v2"; + + opp10-100000 { + opp-hz = /bits/ 64 <133>; + required-opps = <&opp_pd_100>, <&opp_pd_100>; + }; + + opp10-200000 { + opp-hz = /bits/ 64 <266>; + required-opps = <&opp_pd_200>, <&opp_pd_200>; + }; + }; + + //Single perf domain + pm_test5 { + compatible = "test,pm-test"; + power-domains = <&pd_perf0>; + operating-points-v2 = <&opp_table_pm_test5>; + //if the opp table has required-opps, its opp-phandle must + //belong to the same opp table as the pd_perf0 has. If pd_perf0 + //lacks an opp table, a table from a parent pd is fine too. + }; + + //Multi perf domain + pm_test6 { + compatible = "test,pm-test"; + power-domains = <&pd_perf0>, <&pd_perf1>; + power-domain-names = "perf0", "perf1"; + operating-points-v2 = <&opp_table_pm_test6>; + //if the opp table has required-opps, its opp-phandles must + //belong to the opp table as used by pd_perf0 and/or pd_perf1. + //A table from a parent pd should be fine too (Tegra) + }; + + //Single perf domain + pm_test7 { + compatible = "test,pm-test"; + power-domains = <&pd_perf_child>; + operating-points-v2 = <&opp_table_pm_test7>; + //The opp table doesn't have required-opps, but opp-level. The + //levels are the same as supported by pd_perf_child. In this + //case we should be able to set the level. For the multiple + //perf domain case, the level then needs to be set per PM domain + //as there are no required-opps used. + }; + + //Single power domain with parent perf domain + pm_test8 { + compatible = "test,pm-test"; + power-domains = <&pd_power4>; + operating-points-v2 = <&opp_table_pm_test8>; + }; + + //Multi power domain + pm_test9 { + compatible = "test,pm-test"; + power-domains = <&pd_power0>, <&pd_power1>, <&pd_power2>; + power-domain-names = "power0", "power1", "power2"; + }; + + //Multi power domain, common parent perf domain, multi required-opps + pm_test10 { + compatible = "test,pm-test"; + power-domains = <&pd_power4>, <&pd_power5>; + power-domain-names = "perf4", "perf5"; + operating-points-v2 = <&opp_table_pm_test10>; + }; + cpus { #size-cells = < 0x00 >; #address-cells = < 0x01 >; @@ -412,7 +670,9 @@ reg = < 0x00 >; compatible = "arm,cortex-a57"; device_type = "cpu"; - clocks = <&scmi_dvfs 0>; + //clocks = <&scmi_dvfs 0>; + power-domains = <&scmi_dvfs 0>; + power-domain-names = "perf"; }; cpu@1 { @@ -420,7 +680,9 @@ reg = < 0x01 >; compatible = "arm,cortex-a57"; device_type = "cpu"; - clocks = <&scmi_dvfs 0>; + //clocks = <&scmi_dvfs 0>; + power-domains = <&scmi_dvfs 0>; + power-domain-names = "perf"; }; }; @@ -479,7 +741,8 @@ scmi_dvfs: protocol@13 { reg = <0x13>; - #clock-cells = <1>; + #power-domain-cells = <1>; + //#clock-cells = <1>; linaro,optee-channel-id = <0x02>; }; }; |