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authorHariprasad Shenai <hariprasad@chelsio.com>2016-04-15 13:00:18 -0500
committerBjorn Helgaas <bhelgaas@google.com>2016-04-15 13:00:18 -0500
commit67e658794ca191b3221b143f2a1c10d002c40bc8 (patch)
treea5b0cad802e1327e671aa01e705ce97514325527 /drivers/gpio/gpio-vr41xx.c
parentcb92148b58a49455f3a7204eba3aee09a8b7683c (diff)
cxgb4: Set VPD size so we can read both VPD structures
Chelsio adapters have two VPD structures stored in the VPD: - offset 0x000: an abbreviated VPD, and - offset 0x400: the complete VPD. After 104daa71b396 ("PCI: Determine actual VPD size on first access"), the PCI core computes the valid VPD size by parsing the VPD starting at offset 0x0. That size only includes the abbreviated VPD structure, so reads of the complete VPD at 0x400 fail. Explicitly set the VPD size with pci_set_vpd_size() so the driver can read both VPD structures. [bhelgaas: changelog, split patches, rename to pci_set_vpd_size() and return int (not ssize_t)] Fixes: 104daa71b396 ("PCI: Determine actual VPD size on first access") Tested-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/gpio/gpio-vr41xx.c')
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