arm: s5p4418: dm_serial: add uarts to dts

Add S5P4418 UARTs and appropriate pinctrl to dts. Add UART to
s5p4418-nanopi2.dts.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>

3 files changed, 117 insertions, 0 deletions

diff --git a/arch/arm/dts/s5p4418-nanopi2.dts b/arch/arm/dts/s5p4418-nanopi2.dts
index 4deaf10a1c3e..42251e0a05fd 100644
--- a/arch/arm/dts/s5p4418-nanopi2.dts
+++ b/arch/arm/dts/s5p4418-nanopi2.dts
@@ -25,6 +25,7 @@
 		i2c0 = "/i2c@c00a4000";
 		i2c1 = "/i2c@c00a5000";
 		i2c2 = "/i2c@c00a6000";
+		serial0 = "/uart@c00a1000";
 	};
 
 	mmc0:mmc@c0062000 {
@@ -107,4 +108,9 @@
 			};
 		};
 	};
+
+	uart0:uart@c00a1000 {
+		skip-init;
+		status = "okay";
+	};
 };
diff --git a/arch/arm/dts/s5p4418-pinctrl.dtsi b/arch/arm/dts/s5p4418-pinctrl.dtsi
index a7e1c2c3810e..0768d80fc95a 100644
--- a/arch/arm/dts/s5p4418-pinctrl.dtsi
+++ b/arch/arm/dts/s5p4418-pinctrl.dtsi
@@ -132,4 +132,75 @@ pinctrl@C0010000 {
 		pin-pull = <2>;
 		pin-strength = <0>;
 	};
+
+	/* UART */
+	uart0_rx:uart0-rx {
+		pins = "gpiod-14";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart0_tx:uart0-tx {
+		pins = "gpiod-18";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart1_rx:uart1-rx {
+		pins = "gpiod-15";
+		pin-function = <2>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart1_tx:uart1-tx {
+		pins = "gpiod-19";
+		pin-function = <2>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart2_rx:uart2-rx {
+		pins = "gpiod-16";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart2_tx:uart2-tx {
+		pins = "gpiod-20";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart3_rx:uart3-rx {
+		pins = "gpiod-17";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart3_tx:uart3-tx {
+		pins = "gpiod-21";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart4_rx:uart4-rx {
+		pins = "gpiob-28";
+		pin-function = <3>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
+
+	uart4_tx:uart4-tx {
+		pins = "gpiob-29";
+		pin-function = <3>;
+		pin-pull = <2>;
+		pin-strength = <0>;
+	};
 };
diff --git a/arch/arm/dts/s5p4418.dtsi b/arch/arm/dts/s5p4418.dtsi
index a4d1a1bd03a0..3027cd4bb9ca 100644
--- a/arch/arm/dts/s5p4418.dtsi
+++ b/arch/arm/dts/s5p4418.dtsi
@@ -167,4 +167,44 @@
 		reg = <0xc0010000 0xf000>;
 		u-boot,dm-pre-reloc;
 	};
+
+	uart0:uart@c00a1000 {
+		compatible = "nexell,s5p4418-pl011", "arm,primecell";
+		reg = <0xc00a1000 0x1000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_rx>, <&uart0_tx>;
+		status = "disabled";
+	};
+
+	uart1:uart@c00a0000 {
+		compatible = "nexell,s5p4418-pl011", "arm,primecell";
+		reg = <0xc00a0000 0x1000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_rx>, <&uart1_tx>;
+		status = "disabled";
+	};
+
+	uart2:uart@c00a2000 {
+		compatible = "nexell,s5p4418-pl011", "arm,primecell";
+		reg = <0xc00a2000 0x1000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2_rx>, <&uart2_tx>;
+		status = "disabled";
+	};
+
+	uart3:uart@c00a3000 {
+		compatible = "nexell,s5p4418-pl011", "arm,primecell";
+		reg = <0xc00a3000 0x1000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3_rx>, <&uart3_tx>;
+		status = "disabled";
+	};
+
+	uart4:uart@c006d000 {
+		compatible = "nexell,s5p4418-pl011", "arm,primecell";
+		reg = <0xc006d000 0x1000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4_rx>, <&uart4_tx>;
+		status = "disabled";
+	};
 };