diff options
| author | Brendan Le Foll <brendan.le.foll@intel.com> | 2014-11-24 10:51:27 +0000 |
|---|---|---|
| committer | Brendan Le Foll <brendan.le.foll@intel.com> | 2014-11-24 10:51:27 +0000 |
| commit | c01451989ea1daa924a2e304c9d717df8011c2c1 (patch) | |
| tree | 723deb22899187a5275eb583f8756158cc5739a5 /docs/minnow_max.md | |
| parent | 7b93207fd950272d869b8ef0b43d242e7a329b33 (diff) | |
docs: update product names & brand names
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Diffstat (limited to 'docs/minnow_max.md')
| -rw-r--r-- | docs/minnow_max.md | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/docs/minnow_max.md b/docs/minnow_max.md index 4787489..b2d62dd 100644 --- a/docs/minnow_max.md +++ b/docs/minnow_max.md @@ -1,8 +1,10 @@ -Intel Minnowboard Max {#minnowmax} -===================== -MinnowBoard MAX is an open hardware embedded board designed with the Intel® Atom™ E38xx series SOC (known as Bay Trail). +Intel(R) Minnowboard Max {#minnowmax} +======================== +MinnowBoard MAX is an open hardware embedded board designed with the Intel(R) +Atom(TM) E38xx series SOC (Fromerly Bay Trail). -For product overview and faq see http://www.minnowboard.org/faq-minnowboard-max/ +For product overview and faq see +http://www.minnowboard.org/faq-minnowboard-max/ For technical details see http://www.elinux.org/Minnowboard:MinnowMax @@ -12,12 +14,13 @@ mraa has only been tested with 64 bit firmware version 0.73 or later. Interface notes --------------- -The low speed I/O connector supported as per table below. -This assumes default BIOS settings, as they are not dynamcially detected -If any changes are mode (Device Manager -> System Setup -> South Cluster -> LPSS & CSS) -them mraa calls will not behave as expected. +The low speed I/O connector supported as per table below. This assumes default +BIOS settings, as they are not dynamcially detected If any changes are mode +(Device Manager -> System Setup -> South Cluster -> LPSS & CSS) them mraa calls +will not behave as expected. -Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses bus #7. +Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses bus +#7. **SPI operation is not currently supported** |