Add AArch64 support

Change-Id: I24fbe49a2d46381ca0cad45b754cf27385b49c10

2 files changed, 16 insertions, 1 deletions

diff --git a/Makefile b/Makefile
index 614f663..5f6f519 100644
--- a/Makefile
+++ b/Makefile
@@ -1,4 +1,7 @@
 KERNEL_SOURCE ?= /usr/src/linux-headers-$(shell uname -r)
 
-all:
+arm:
 	make ARCH=arm -C $(KERNEL_SOURCE) SUBDIRS="`pwd`" modules
+
+arm64:
+	make ARCH=arm64 -C $(KERNEL_SOURCE) SUBDIRS="`pwd`" modules
diff --git a/modex.c b/modex.c
index 4745910..4e196d1 100644
--- a/modex.c
+++ b/modex.c
@@ -72,6 +72,7 @@ static ssize_t modex_read(struct file *file, char *buffer, size_t length, loff_t
     int msg_len;
     volatile unsigned int actlr, midr, clidr, ccsidr_l1d, ccsidr_l2u;
     unsigned int l1d = 0; unsigned int l2u = 2;
+#ifdef __arm__
              asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr)); //read actlr
              asm("mrc p15, 0, %0, c0, c0, 0" : "=r" (midr));  //read midr
              asm("mrc p15, 1, %0, c0, c0, 1" : "=r" (clidr));
@@ -79,6 +80,17 @@ static ssize_t modex_read(struct file *file, char *buffer, size_t length, loff_t
     asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (ccsidr_l1d));
     asm volatile("mcr p15, 2, %0, c0, c0, 0\nisb" :: "r" (l2u));   //set csselr (cache size selection register)
     asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (ccsidr_l2u));
+#elif defined __aarch64__
+             asm("mrs %0, ACTLR_EL1" : "=r" (actlr));
+             asm("mrs %0, MIDR_EL1" : "=r" (midr));
+             asm("mrs %0, CLIDR_EL1" : "=r" (clidr));
+    asm volatile("msr CSSELR_EL1, %0\nisb" :: "r" (l1d));
+    asm volatile("mrs %0, CCSIDR_EL1" : "=r" (ccsidr_l1d));
+    asm volatile("msr CSSELR_EL1, %0\nisb" :: "r" (l2u));
+    asm volatile("mrs %0, CCSIDR_EL1" : "=r" (ccsidr_l2u));
+#else
+  #error "Non-ARM compiler"
+#endif
     bytes_written = snprintf(msg, sizeof msg_buffer,
                  "ACTLR:       %#.8x\n"
                  "MIDR:        %#.8x\n"