ARM TCG conversion 5/16.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4142 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 0 insertions, 58 deletions

diff --git a/target-arm/op.c b/target-arm/op.c
index d8906b447..2ab99a274 100644
--- a/target-arm/op.c
+++ b/target-arm/op.c
@@ -222,29 +222,6 @@ void OPPROTO op_movl_cpsr_T0(void)
     FORCE_RET();
 }
 
-void OPPROTO op_mul_T0_T1(void)
-{
-    T0 = T0 * T1;
-}
-
-/* 64 bit unsigned mul */
-void OPPROTO op_mull_T0_T1(void)
-{
-    uint64_t res;
-    res = (uint64_t)T0 * (uint64_t)T1;
-    T1 = res >> 32;
-    T0 = res;
-}
-
-/* 64 bit signed mul */
-void OPPROTO op_imull_T0_T1(void)
-{
-    uint64_t res;
-    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
-    T1 = res >> 32;
-    T0 = res;
-}
-
 /* 48 bit signed mul, top 32 bits */
 void OPPROTO op_imulw_T0_T1(void)
 {
@@ -1058,18 +1035,6 @@ void OPPROTO op_pkhbt_T0_T1(void)
 {
     T0 = (T0 & 0xffff) | (T1 & 0xffff0000);
 }
-void OPPROTO op_rev_T0(void)
-{
-    T0 =  ((T0 & 0xff000000) >> 24)
-        | ((T0 & 0x00ff0000) >> 8)
-        | ((T0 & 0x0000ff00) << 8)
-        | ((T0 & 0x000000ff) << 24);
-}
-
-void OPPROTO op_revh_T0(void)
-{
-    T0 = (T0 >> 16) | (T0 << 16);
-}
 
 void OPPROTO op_rev16_T0(void)
 {
@@ -1099,13 +1064,6 @@ void OPPROTO op_rbit_T0(void)
         | ((T0 & 0x11111111) << 3);
 }
 
-/* Swap low and high halfwords.  */
-void OPPROTO op_swap_half_T1(void)
-{
-    T1 = (T1 >> 16) | (T1 << 16);
-    FORCE_RET();
-}
-
 /* Dual 16-bit signed multiply.  */
 void OPPROTO op_mul_dual_T0_T1(void)
 {
@@ -1267,22 +1225,6 @@ void OPPROTO op_sbfx_T1(void)
     T1 = val >> (32 - width);
 }
 
-void OPPROTO op_movtop_T0_im(void)
-{
-    T0 = (T0 & 0xffff) | PARAM1;
-}
-
-/* Used by table branch instructions.  */
-void OPPROTO op_jmp_T0_im(void)
-{
-    env->regs[15] = PARAM1 + (T0 << 1);
-}
-
-void OPPROTO op_set_condexec(void)
-{
-    env->condexec_bits = PARAM1;
-}
-
 void OPPROTO op_sdivl_T0_T1(void)
 {
   int32_t num;