diff options
author | Peter Griffin <peter.griffin@linaro.org> | 2014-06-25 16:37:07 +0100 |
---|---|---|
committer | Peter Griffin <peter.griffin@linaro.org> | 2014-06-25 16:37:07 +0100 |
commit | 748484dec24fa42e6a3eac60f50e740f943fc1cb (patch) | |
tree | ae25041969562e71295d0a795a1288a7b482867c | |
parent | 89f9e6491651b0966ae0f620ebc3f753d9b8effc (diff) |
ARM: STi: DT: STiH407: Add ethernet device tree nodesb2120-ethernet
-rw-r--r-- | arch/arm/boot/dts/stih407-b2120.dts | 40 | ||||
-rw-r--r-- | arch/arm/boot/dts/stih407.dtsi | 29 |
2 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts index fe69f92e5f82..17f2a6a9e110 100644 --- a/arch/arm/boot/dts/stih407-b2120.dts +++ b/arch/arm/boot/dts/stih407-b2120.dts @@ -74,5 +74,45 @@ st,i2c-min-scl-pulse-width-us = <0>; st,i2c-min-sda-pulse-width-us = <5>; }; + + ethernet0: dwmac@9630000 { + st,tx-retime-src = "clkgen"; + status = "okay"; + phy-mode = "rgmii"; + fixed-link = <1 1000 0 0>; + snps,phy-addr = <0x1>; + }; + + realtek: rtl8367rb { + compatible = "realtek,rtl8367rb"; + status = "okay"; + + gpio-reset = <&pio0 7 0>; + gpio-sck = <&pio1 1 0>; + gpio-sda = <&pio1 0 0>; + + rtl8367rb,extif1; + rtl8367rb,extif1-mode = <1>; // RGMII + rtl8367rb,extif1-txdelay = <0>; + rtl8367rb,extif1-rxdelay = <1>; + rtl8367rb,extif1-force_mode = <1>; + rtl8367rb,extif1-txpause = <2>; + rtl8367rb,extif1-rxpause = <2>; + rtl8367rb,extif1-link = <1>; + rtl8367rb,extif1-duplex = <1>; + rtl8367rb,extif1-speed = <2>; // Giga speed + + rtl8367rb,extif2; + rtl8367rb,extif2-mode = <1>; // RGMII + rtl8367rb,extif2-txdelay = <1>; + rtl8367rb,extif2-rxdelay = <1>; + rtl8367rb,extif2-force_mode = <1>; + rtl8367rb,extif2-txpause = <1>; + rtl8367rb,extif2-rxpause = <1>; + rtl8367rb,extif2-link = <1>; + rtl8367rb,extif2-duplex = <1>; + rtl8367rb,extif2-speed = <2>; // Giga speed + }; + }; }; diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi index 4f9024f19866..bc87261b9a38 100644 --- a/arch/arm/boot/dts/stih407.dtsi +++ b/arch/arm/boot/dts/stih407.dtsi @@ -259,5 +259,34 @@ status = "disabled"; }; + + ethernet0: dwmac@9630000 { + device_type = "network"; + status = "disabled"; + compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710"; + reg = <0x9630000 0x8000>, <0x80 0x4>; + reg-names = "stmmaceth", "sti-ethconf"; + + st,syscon = <&syscfg_sbc_reg>; + st,gmac_en; +/* resets = <&softreset STIH407_ETH1_SOFTRESET>; + reset-names = "stmmaceth";*/ + + interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>, + <GIC_SPI 99 IRQ_TYPE_NONE>, + <GIC_SPI 100 IRQ_TYPE_NONE>; + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; + + snps,pbl = <32>; + snps,mixed-burst; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1>; + +/* clock-names = "stmmaceth", "sti-ethclk"; + clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>, + <&CLK_S_C0_FLEXGEN CLK_ETH_PHY>;*/ + }; + }; }; |