diff options
| author | Jens Wiklander <jens.wiklander@linaro.org> | 2014-12-14 22:18:03 +0100 |
|---|---|---|
| committer | Jens Wiklander <jens.wiklander@linaro.org> | 2015-01-19 09:37:10 +0100 |
| commit | c45480851a2c86e1c2bf9bf225466a74271de1fa (patch) | |
| tree | b6fc4ab01aee993b07473abdf9a686ef162321a8 /core | |
| parent | 0f2293b796b141d15c18db856d63f200e4f02981 (diff) | |
plat-vexpress: config nsacr
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/arch/arm32/include/arm32.h | 3 | ||||
| -rw-r--r-- | core/arch/arm32/plat-vexpress/main.c | 14 |
2 files changed, 17 insertions, 0 deletions
diff --git a/core/arch/arm32/include/arm32.h b/core/arch/arm32/include/arm32.h index 093ed79..bac4a62 100644 --- a/core/arch/arm32/include/arm32.h +++ b/core/arch/arm32/include/arm32.h @@ -109,6 +109,9 @@ #define TTBCR_PD0 (1 << 4) #define TTBCR_PD1 (1 << 5) +#define NSACR_CP10 (1 << 10) +#define NSACR_CP11 (1 << 11) + #ifndef ASM static inline uint32_t read_mpidr(void) { diff --git a/core/arch/arm32/plat-vexpress/main.c b/core/arch/arm32/plat-vexpress/main.c index 1ddce7a..1d4938a 100644 --- a/core/arch/arm32/plat-vexpress/main.c +++ b/core/arch/arm32/plat-vexpress/main.c @@ -256,6 +256,18 @@ static void main_init_sec_mon(size_t pos, uint32_t nsec_entry) } #endif +#if defined(WITH_ARM_TRUSTED_FW) +static void main_init_nsacr(void) +{ +} +#else +static void main_init_nsacr(void) +{ + /* Normal world can use CP10 and CP11 (SIMD/VFP) */ + write_nsacr(read_nsacr() | NSACR_CP10 | NSACR_CP11); +} +#endif + #if PLATFORM_FLAVOR_IS(fvp) || PLATFORM_FLAVOR_IS(juno) static void main_init_gic(void) { @@ -508,6 +520,7 @@ static void main_init_primary_helper(uint32_t pagable_part, uint32_t nsec_entry) main_init_thread_stacks(); main_init_gic(); + main_init_nsacr(); if (init_teecore() != TEE_SUCCESS) panic(); @@ -534,6 +547,7 @@ static void main_init_secondary_helper(uint32_t nsec_entry) thread_init_per_cpu(); main_init_sec_mon(pos, nsec_entry); + main_init_nsacr(); DMSG("Secondary CPU Switching to normal world boot\n"); } |