diff options
author | Jens Wiklander <jens.wiklander@linaro.org> | 2014-12-04 09:31:14 +0100 |
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committer | Jens Wiklander <jens.wiklander@linaro.org> | 2014-12-12 12:11:18 +0100 |
commit | d6d47ed9befef3b6c6d6a5e19903a7dd0358aa74 (patch) | |
tree | c99c4307d05663fd92ef81568040536ff8f36e41 /core/arch/arm32 | |
parent | 6d6ea54c181e3e01ae3a9cc056095b33704b2990 (diff) |
arm32: clear junk in UL1 table
Clears junk in UL1 translation table when setting mapping for a TA in
tee_mmu_set_ctx().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt)
Diffstat (limited to 'core/arch/arm32')
-rw-r--r-- | core/arch/arm32/mm/tee_mmu.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/core/arch/arm32/mm/tee_mmu.c b/core/arch/arm32/mm/tee_mmu.c index 5680c48..196131b 100644 --- a/core/arch/arm32/mm/tee_mmu.c +++ b/core/arch/arm32/mm/tee_mmu.c @@ -583,10 +583,12 @@ void tee_mmu_set_ctx(struct tee_ta_ctx *ctx) tee_mmu_switch(read_ttbr1(), 0); } else { paddr_t base = core_mmu_get_ul1_ttb_pa(); - void *va = (void *)core_mmu_get_ul1_ttb_va(); + uint32_t *ul1 = (void *)core_mmu_get_ul1_ttb_va(); /* copy uTA mapping at begning of mmu table */ - memcpy(va, ctx->mmu->table, ctx->mmu->size * 4); + memcpy(ul1, ctx->mmu->table, ctx->mmu->size * 4); + memset(ul1 + ctx->mmu->size, 0, + (TEE_MMU_UL1_NUM_ENTRIES - ctx->mmu->size) * 4); /* Change ASID to new value */ tee_mmu_switch(base | TEE_MMU_DEFAULT_ATTRS, ctx->context); |