| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-08-15 | drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH | Hai Li |
| 2015-08-15 | drm/msm/mdp5: Allocate CTL for each display interface | Hai Li |
| 2015-06-11 | drm/msm/mdp5: Always generate active-high sync signals for DSI | Hai Li |
| 2015-06-11 | drm/msm: clarify downstream bus scaling | Rob Clark |
| 2015-06-11 | drm/msm: update generated headers | Rob Clark |
| 2015-04-01 | drm/msm/mdp5: Enable DSI connector in msm drm driver | Hai Li |
| 2015-04-01 | drm/msm/mdp5: Add START signal to kick off certain pipelines | Stephane Viau |
| 2015-04-01 | drm/msm/mdp5: Enhance operation mode for pipeline configuration | Stephane Viau |
| 2015-03-04 | drm/msm/mdp5: fixup "drm/msm: fix fallout of atomic dpms changes" | Stephane Viau |
| 2015-02-01 | drm/msm: Add the eDP connector in msm drm driver (V2) | Hai Li |
| 2015-02-01 | drm/msm: fix fallout of atomic dpms changes | Rob Clark |
| 2014-11-21 | drm/msm/mdp5: dpms(OFF) cleanups | Rob Clark |
| 2014-11-21 | drm/msm: add multiple CRTC and overlay support | Stephane Viau |
| 2014-01-09 | drm/msm: add mdp5/apq8x74 | Rob Clark |
 |
index : dlezcano/linux.git | |
| Cpuidle for ARM and clocksource/clockevents tree for the upstream kernel |
| summaryrefslogtreecommitdiff |