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authorAnthony Zhou <anzhou@nvidia.com>2017-07-07 14:29:51 +0800
committerVarun Wadekar <vwadekar@nvidia.com>2019-01-18 09:21:50 -0800
commit4c9940022801725ad6871078650be09ca01ca0d5 (patch)
treedd53ffc449fe05efe463dcb7fe0e59e9419d8d3e /plat/nvidia/tegra/common/tegra_fiq_glue.c
parent75516c3eb021e91e37e4d3115a0bbab143ddd2ff (diff)
Tegra: common: fix defects flagged by MISRA scan
Macro assert(e) request 'e' is a bool type, if useing other type, MISRA report a "The Essential Type Model" violation, Add a judgement to fix the defects, if 'e' is not bool type. Remove unused code [Rule 2.5] Fix the essential type model violation [Rule 10.6, 10.7] Use local parameter to raplace function parameter [Rule 17.8] Change-Id: Ifce932addbb0a4b063ef6b38349d886c051d81c0 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/common/tegra_fiq_glue.c')
-rw-r--r--plat/nvidia/tegra/common/tegra_fiq_glue.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/common/tegra_fiq_glue.c b/plat/nvidia/tegra/common/tegra_fiq_glue.c
index 9a43f769..cab2e5ec 100644
--- a/plat/nvidia/tegra/common/tegra_fiq_glue.c
+++ b/plat/nvidia/tegra/common/tegra_fiq_glue.c
@@ -65,7 +65,7 @@ static uint64_t tegra_fiq_interrupt_handler(uint32_t id,
* Set the new ELR to continue execution in the NS world using the
* FIQ handler registered earlier.
*/
- assert(ns_fiq_handler_addr);
+ assert(ns_fiq_handler_addr != 0ULL);
write_ctx_reg((el3state_ctx), (uint32_t)(CTX_ELR_EL3), (ns_fiq_handler_addr));
/*