diff options
| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-27 14:24:16 +0000 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-28 12:01:13 +0000 |
| commit | 25278eaba7b93701e046a8215f84843674d4ca02 (patch) | |
| tree | d123d6a84587f8692e5e847e4ac2328ce891b908 /lib | |
| parent | 64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a (diff) | |
Cortex-A73: Implement workaround for errata 852427
In AArch32, execution of 2 instructions with opposite condition code
might lead to either a data corruption or a CPU deadlock. Set the bit
12 of the Diagnostic Register to prevent this.
Change-Id: I22b4f25fe933e2942fd785e411e7c0aa39d5c1f4
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a73.S | 36 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
2 files changed, 44 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a73.S b/lib/cpus/aarch64/cortex_a73.S index 6cfa4b52..5c8a8871 100644 --- a/lib/cpus/aarch64/cortex_a73.S +++ b/lib/cpus/aarch64/cortex_a73.S @@ -36,6 +36,34 @@ func cortex_a73_disable_smp endfunc cortex_a73_disable_smp /* --------------------------------------------------- + * Errata Workaround for Cortex A73 Errata #852427. + * This applies only to revision r0p0 of Cortex A73. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * --------------------------------------------------- + */ +func errata_a73_852427_wa + /* + * Compare x0 against revision r0p0 + */ + mov x17, x30 + bl check_errata_852427 + cbz x0, 1f + mrs x1, CORTEX_A73_DIAGNOSTIC_REGISTER + orr x1, x1, #(1 << 12) + msr CORTEX_A73_DIAGNOSTIC_REGISTER, x1 + isb +1: + ret x17 +endfunc errata_a73_852427_wa + +func check_errata_852427 + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_852427 + + /* --------------------------------------------------- * Errata Workaround for Cortex A73 Errata #855423. * This applies only to revision <= r0p1 of Cortex A73. * Inputs: @@ -71,8 +99,15 @@ endfunc check_errata_855423 func cortex_a73_reset_func mov x19, x30 bl cpu_get_rev_var + mov x18, x0 + +#if ERRATA_A73_852427 + mov x0, x18 + bl errata_a73_852427_wa +#endif #if ERRATA_A73_855423 + mov x0, x18 bl errata_a73_855423_wa #endif @@ -200,6 +235,7 @@ func cortex_a73_errata_report * Report all errata. The revision-variant information is passed to * checking functions of each errata. */ + report_errata ERRATA_A73_852427, cortex_a73, 852427 report_errata ERRATA_A73_855423, cortex_a73, 855423 report_errata WORKAROUND_CVE_2017_5715, cortex_a73, cve_2017_5715 report_errata WORKAROUND_CVE_2018_3639, cortex_a73, cve_2018_3639 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 02208f0e..23f6c237 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -119,6 +119,10 @@ ERRATA_A57_859972 ?=0 # only to revision <= r0p3 of the Cortex A72 cpu. ERRATA_A72_859971 ?=0 +# Flag to apply erratum 852427 workaround during reset. This erratum applies +# only to revision r0p0 of the Cortex A73 cpu. +ERRATA_A73_852427 ?=0 + # Flag to apply erratum 855423 workaround during reset. This erratum applies # only to revision <= r0p1 of the Cortex A73 cpu. ERRATA_A73_855423 ?=0 @@ -212,6 +216,10 @@ $(eval $(call add_define,ERRATA_A57_859972)) $(eval $(call assert_boolean,ERRATA_A72_859971)) $(eval $(call add_define,ERRATA_A72_859971)) +# Process ERRATA_A73_852427 flag +$(eval $(call assert_boolean,ERRATA_A73_852427)) +$(eval $(call add_define,ERRATA_A73_852427)) + # Process ERRATA_A73_855423 flag $(eval $(call assert_boolean,ERRATA_A73_855423)) $(eval $(call add_define,ERRATA_A73_855423)) |