Merge pull request #1532 from jeenu-arm/misra-fixes

MISRA fixes

8 files changed, 112 insertions, 114 deletions

diff --git a/include/bl31/ehf.h b/include/bl31/ehf.h
index f963f8d0..14462798 100644
--- a/include/bl31/ehf.h
+++ b/include/bl31/ehf.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __EHF_H__
-#define __EHF_H__
+#ifndef EHF_H
+#define EHF_H
 
 #ifndef __ASSEMBLY__
 
@@ -13,27 +13,27 @@
 #include <utils_def.h>
 
 /* Valid priorities set bit 0 of the priority handler. */
-#define _EHF_PRI_VALID	(((uintptr_t) 1) << 0)
+#define EHF_PRI_VALID_	(((uintptr_t) 1) << 0)
 
 /* Marker for no handler registered for a valid priority */
-#define _EHF_NO_HANDLER	(0 | _EHF_PRI_VALID)
+#define EHF_NO_HANDLER_	(0U | EHF_PRI_VALID_)
 
 /* Extract the specified number of top bits from 7 lower bits of priority */
 #define EHF_PRI_TO_IDX(pri, plat_bits) \
-	((pri & 0x7f) >> (7 - plat_bits))
+	((((unsigned) (pri)) & 0x7fu) >> (7u - (plat_bits)))
 
 /* Install exception priority descriptor at a suitable index */
 #define EHF_PRI_DESC(plat_bits, priority) \
 	[EHF_PRI_TO_IDX(priority, plat_bits)] = { \
-		.ehf_handler = _EHF_NO_HANDLER, \
+		.ehf_handler = EHF_NO_HANDLER_, \
 	}
 
 /* Macro for platforms to regiter its exception priorities */
 #define EHF_REGISTER_PRIORITIES(priorities, num, bits) \
 	const ehf_priorities_t exception_data = { \
-		.num_priorities = num, \
-		.ehf_priorities = priorities, \
-		.pri_bits = bits, \
+		.num_priorities = (num), \
+		.ehf_priorities = (priorities), \
+		.pri_bits = (bits), \
 	}
 
 /*
@@ -72,10 +72,10 @@ typedef struct ehf_pri_desc {
 	uintptr_t ehf_handler;
 } ehf_pri_desc_t;
 
-typedef struct ehf_priorities {
+typedef struct ehf_priority_type {
 	ehf_pri_desc_t *ehf_priorities;
 	unsigned int num_priorities;
-	int pri_bits;
+	unsigned int pri_bits;
 } ehf_priorities_t;
 
 void ehf_init(void);
@@ -87,4 +87,4 @@ unsigned int ehf_is_ns_preemption_allowed(void);
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __EHF_H__ */
+#endif /* EHF_H */
diff --git a/include/bl31/interrupt_mgmt.h b/include/bl31/interrupt_mgmt.h
index 905dcd66..49ba9f73 100644
--- a/include/bl31/interrupt_mgmt.h
+++ b/include/bl31/interrupt_mgmt.h
@@ -61,10 +61,10 @@
 #define INTR_RM_FROM_SEC_SHIFT		SECURE		/* BIT[0] */
 #define INTR_RM_FROM_NS_SHIFT		NON_SECURE	/* BIT[1] */
 #define INTR_RM_FROM_FLAG_MASK		U(1)
-#define get_interrupt_rm_flag(flag, ss)	(((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \
-					 & INTR_RM_FROM_FLAG_MASK)
-#define set_interrupt_rm_flag(flag, ss)	(flag |= U(1) << ss)
-#define clr_interrupt_rm_flag(flag, ss)	(flag &= ~(U(1) << ss))
+#define get_interrupt_rm_flag(flag, ss) \
+	((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
+#define set_interrupt_rm_flag(flag, ss)	((flag) |= U(1) << (ss))
+#define clr_interrupt_rm_flag(flag, ss)	((flag) &= ~(U(1) << (ss)))
 
 
 /*******************************************************************************
@@ -101,9 +101,9 @@
  ******************************************************************************/
 #define INTR_SRC_SS_FLAG_SHIFT		U(0)		/* BIT[0] */
 #define INTR_SRC_SS_FLAG_MASK		U(1)
-#define set_interrupt_src_ss(flag, val)	(flag |= val << INTR_SRC_SS_FLAG_SHIFT)
-#define clr_interrupt_src_ss(flag)	(flag &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
-#define get_interrupt_src_ss(flag)	((flag >> INTR_SRC_SS_FLAG_SHIFT) & \
+#define set_interrupt_src_ss(flag, val)	((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT)
+#define clr_interrupt_src_ss(flag)	((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
+#define get_interrupt_src_ss(flag)	(((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \
 					 INTR_SRC_SS_FLAG_MASK)
 
 #ifndef __ASSEMBLY__
diff --git a/include/common/param_header.h b/include/common/param_header.h
index c982fc90..4e61fadb 100644
--- a/include/common/param_header.h
+++ b/include/common/param_header.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -23,7 +23,7 @@
 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
 	(_p)->h.type = (uint8_t)(_type); \
 	(_p)->h.version = (uint8_t)(_ver); \
-	(_p)->h.size = (uint16_t)sizeof(*_p); \
+	(_p)->h.size = (uint16_t)sizeof(*(_p)); \
 	(_p)->h.attr = (uint32_t)(_attr) ; \
 	} while (0)
 
diff --git a/include/drivers/arm/gic_common.h b/include/drivers/arm/gic_common.h
index 6e953a0d..00cbd1d9 100644
--- a/include/drivers/arm/gic_common.h
+++ b/include/drivers/arm/gic_common.h
@@ -7,6 +7,8 @@
 #ifndef __GIC_COMMON_H__
 #define __GIC_COMMON_H__
 
+#include <utils_def.h>
+
 /*******************************************************************************
  * GIC Distributor interface general definitions
  ******************************************************************************/
@@ -34,10 +36,10 @@
 #define GIC_INTR_CFG_EDGE		(1 << 1)
 
 /* Constants to categorise priorities */
-#define GIC_HIGHEST_SEC_PRIORITY	0x0
-#define GIC_LOWEST_SEC_PRIORITY		0x7f
-#define GIC_HIGHEST_NS_PRIORITY		0x80
-#define GIC_LOWEST_NS_PRIORITY		0xfe /* 0xff would disable all interrupts */
+#define GIC_HIGHEST_SEC_PRIORITY	U(0x00)
+#define GIC_LOWEST_SEC_PRIORITY		U(0x7f)
+#define GIC_HIGHEST_NS_PRIORITY		U(0x80)
+#define GIC_LOWEST_NS_PRIORITY		U(0xfe) /* 0xff would disable all interrupts */
 
 /*******************************************************************************
  * GIC Distributor interface register offsets that are common to GICv3 & GICv2
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h
index a2ce9f82..b990674c 100644
--- a/include/lib/el3_runtime/aarch64/context.h
+++ b/include/lib/el3_runtime/aarch64/context.h
@@ -241,9 +241,9 @@ DEFINE_REG_STRUCT(cve_2018_3639, CTX_CVE_2018_3639_ALL);
  * Macros to access members of any of the above structures using their
  * offsets
  */
-#define read_ctx_reg(ctx, offset)	((ctx)->_regs[offset >> DWORD_SHIFT])
-#define write_ctx_reg(ctx, offset, val)	(((ctx)->_regs[offset >> DWORD_SHIFT]) \
-					 = val)
+#define read_ctx_reg(ctx, offset)	((ctx)->_regs[(offset) >> DWORD_SHIFT])
+#define write_ctx_reg(ctx, offset, val)	(((ctx)->_regs[(offset) >> DWORD_SHIFT]) \
+					 = (uint64_t) (val))
 
 /*
  * Top-level context structure which is used by EL3 firmware to
diff --git a/include/lib/extensions/ras.h b/include/lib/extensions/ras.h
index f57fc3af..400de592 100644
--- a/include/lib/extensions/ras.h
+++ b/include/lib/extensions/ras.h
@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __RAS_COMMON__
-#define __RAS_COMMON__
+#ifndef RAS_COMMON
+#define RAS_COMMON
 
-#define ERR_HANDLER_VERSION	1
+#define ERR_HANDLER_VERSION	1U
 
 /* Error record access mechanism */
 #define ERR_ACCESS_SYSREG	0
@@ -20,18 +20,18 @@
  * are declared. Only then would ARRAY_SIZE() yield a meaningful value.
  */
 #define REGISTER_ERR_RECORD_INFO(_records) \
-	const struct err_record_mapping err_record_mapping = { \
-		.err_records = _records, \
+	const struct err_record_mapping err_record_mappings = { \
+		.err_records = (_records), \
 		.num_err_records = ARRAY_SIZE(_records), \
 	}
 
 /* Error record info iterator */
 #define for_each_err_record_info(_i, _info) \
-	for (_i = 0, _info = err_record_mapping.err_records; \
-		_i < err_record_mapping.num_err_records; \
-		_i++, _info++)
+	for ((_i) = 0, (_info) = err_record_mappings.err_records; \
+		(_i) < err_record_mappings.num_err_records; \
+		(_i)++, (_info)++)
 
-#define _ERR_RECORD_COMMON(_probe, _handler, _aux) \
+#define ERR_RECORD_COMMON_(_probe, _handler, _aux) \
 	.probe = _probe, \
 	.handler = _handler, \
 	.aux_data = _aux,
@@ -42,7 +42,7 @@
 		.sysreg.idx_start = _idx_start, \
 		.sysreg.num_idx = _num_idx, \
 		.access = ERR_ACCESS_SYSREG, \
-		_ERR_RECORD_COMMON(_probe, _handler, _aux) \
+		ERR_RECORD_COMMON_(_probe, _handler, _aux) \
 	}
 
 #define ERR_RECORD_MEMMAP_V1(_base_addr, _size_num_k, _probe, _handler, _aux) \
@@ -51,7 +51,7 @@
 		.memmap.base_addr = _base_addr, \
 		.memmap.size_num_k = _size_num_k, \
 		.access = ERR_ACCESS_MEMMAP, \
-		_ERR_RECORD_COMMON(_probe, _handler, _aux) \
+		ERR_RECORD_COMMON_(_probe, _handler, _aux) \
 	}
 
 /*
@@ -63,8 +63,8 @@
  * array is expected to be sorted in the increasing order of interrupt number.
  */
 #define REGISTER_RAS_INTERRUPTS(_array) \
-	const struct ras_interrupt_mapping ras_interrupt_mapping = { \
-		.intrs = _array, \
+	const struct ras_interrupt_mapping ras_interrupt_mappings = { \
+		.intrs = (_array), \
 		.num_intrs = ARRAY_SIZE(_array), \
 	}
 
@@ -165,8 +165,8 @@ struct ras_interrupt_mapping {
 	size_t num_intrs;
 };
 
-extern const struct err_record_mapping err_record_mapping;
-extern const struct ras_interrupt_mapping ras_interrupt_mapping;
+extern const struct err_record_mapping err_record_mappings;
+extern const struct ras_interrupt_mapping ras_interrupt_mappings;
 
 
 /*
@@ -196,4 +196,4 @@ int ras_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
 void ras_init(void);
 
 #endif /* __ASSEMBLY__ */
-#endif /* __RAS_COMMON__ */
+#endif /* RAS_COMMON */
diff --git a/include/lib/extensions/ras_arch.h b/include/lib/extensions/ras_arch.h
index 6ec4da80..e6cd736a 100644
--- a/include/lib/extensions/ras_arch.h
+++ b/include/lib/extensions/ras_arch.h
@@ -11,28 +11,28 @@
  * Size of nodes implementing Standard Error Records - currently only 4k is
  * supported.
  */
-#define STD_ERR_NODE_SIZE_NUM_K		4
+#define STD_ERR_NODE_SIZE_NUM_K		4U
 
 /*
  * Individual register offsets within an error record in Standard Error Record
  * format when error records are accessed through memory-mapped registers.
  */
-#define ERR_FR(n)	(0x0 + (64 * (n)))
-#define ERR_CTLR(n)	(0x8 + (64 * (n)))
-#define ERR_STATUS(n)	(0x10 + (64 * (n)))
-#define ERR_ADDR(n)	(0x18 + (64 * (n)))
-#define ERR_MISC0(n)	(0x20 + (64 * (n)))
-#define ERR_MISC1(n)	(0x28 + (64 * (n)))
+#define ERR_FR(n)	(0x0ULL + (64ULL * (n)))
+#define ERR_CTLR(n)	(0x8ULL + (64ULL * (n)))
+#define ERR_STATUS(n)	(0x10ULL + (64ULL * (n)))
+#define ERR_ADDR(n)	(0x18ULL + (64ULL * (n)))
+#define ERR_MISC0(n)	(0x20ULL + (64ULL * (n)))
+#define ERR_MISC1(n)	(0x28ULL + (64ULL * (n)))
 
 /* Group Status Register (ERR_STATUS) offset */
 #define ERR_GSR(base, size_num_k, n) \
-	((base) + (0x380 * (size_num_k)) + (8 * (n)))
+	((base) + (0x380ULL * (size_num_k)) + (8ULL * (n)))
 
 /* Management register offsets */
 #define ERR_DEVID(base, size_num_k) \
-	((base) + ((0x400 * (size_num_k)) - 0x100) + 0xc8)
+	((base) + ((0x400ULL * (size_num_k)) - 0x100ULL) + 0xc8ULL)
 
-#define ERR_DEVID_MASK	0xffff
+#define ERR_DEVID_MASK	0xffffUL
 
 /* Standard Error Record status register fields */
 #define ERR_STATUS_AV_SHIFT	31
@@ -244,7 +244,8 @@ static inline uint64_t ser_get_misc1(uintptr_t base, unsigned int idx)
  */
 static inline void ser_sys_select_record(unsigned int idx)
 {
-	unsigned int max_idx __unused = read_erridr_el1() & ERRIDR_MASK;
+	unsigned int max_idx __unused =
+		(unsigned int) read_erridr_el1() & ERRIDR_MASK;
 
 	assert(idx < max_idx);
 
diff --git a/include/services/sdei.h b/include/services/sdei.h
index 79d1d065..4d0fd3fd 100644
--- a/include/services/sdei.h
+++ b/include/services/sdei.h
@@ -4,61 +4,56 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SDEI_H__
-#define __SDEI_H__
+#ifndef SDEI_H
+#define SDEI_H
 
 #include <spinlock.h>
 #include <utils_def.h>
 
 /* Range 0xC4000020 - 0xC400003F reserved for SDE 64bit smc calls */
-#define SDEI_VERSION				0xC4000020
-#define SDEI_EVENT_REGISTER			0xC4000021
-#define SDEI_EVENT_ENABLE			0xC4000022
-#define SDEI_EVENT_DISABLE			0xC4000023
-#define SDEI_EVENT_CONTEXT			0xC4000024
-#define SDEI_EVENT_COMPLETE			0xC4000025
-#define SDEI_EVENT_COMPLETE_AND_RESUME		0xC4000026
-
-#define SDEI_EVENT_UNREGISTER			0xC4000027
-#define SDEI_EVENT_STATUS			0xC4000028
-#define SDEI_EVENT_GET_INFO			0xC4000029
-#define SDEI_EVENT_ROUTING_SET			0xC400002A
-#define SDEI_PE_MASK				0xC400002B
-#define SDEI_PE_UNMASK				0xC400002C
-
-#define SDEI_INTERRUPT_BIND			0xC400002D
-#define SDEI_INTERRUPT_RELEASE			0xC400002E
-#define SDEI_EVENT_SIGNAL			0xC400002F
-#define SDEI_FEATURES				0xC4000030
-#define SDEI_PRIVATE_RESET			0xC4000031
-#define SDEI_SHARED_RESET			0xC4000032
+#define SDEI_VERSION				0xC4000020U
+#define SDEI_EVENT_REGISTER			0xC4000021U
+#define SDEI_EVENT_ENABLE			0xC4000022U
+#define SDEI_EVENT_DISABLE			0xC4000023U
+#define SDEI_EVENT_CONTEXT			0xC4000024U
+#define SDEI_EVENT_COMPLETE			0xC4000025U
+#define SDEI_EVENT_COMPLETE_AND_RESUME		0xC4000026U
+
+#define SDEI_EVENT_UNREGISTER			0xC4000027U
+#define SDEI_EVENT_STATUS			0xC4000028U
+#define SDEI_EVENT_GET_INFO			0xC4000029U
+#define SDEI_EVENT_ROUTING_SET			0xC400002AU
+#define SDEI_PE_MASK				0xC400002BU
+#define SDEI_PE_UNMASK				0xC400002CU
+
+#define SDEI_INTERRUPT_BIND			0xC400002DU
+#define SDEI_INTERRUPT_RELEASE			0xC400002EU
+#define SDEI_EVENT_SIGNAL			0xC400002FU
+#define SDEI_FEATURES				0xC4000030U
+#define SDEI_PRIVATE_RESET			0xC4000031U
+#define SDEI_SHARED_RESET			0xC4000032U
 
 /* SDEI_EVENT_REGISTER flags */
-#define SDEI_REGF_RM_ANY	0
-#define SDEI_REGF_RM_PE		1
+#define SDEI_REGF_RM_ANY	0ULL
+#define SDEI_REGF_RM_PE		1ULL
 
 /* SDEI_EVENT_COMPLETE status flags */
-#define SDEI_EV_HANDLED		0
-#define SDEI_EV_FAILED		1
-
-/* SDE event status values in bit position */
-#define SDEI_STATF_REGISTERED		0
-#define SDEI_STATF_ENABLED		1
-#define SDEI_STATF_RUNNING		2
+#define SDEI_EV_HANDLED		0U
+#define SDEI_EV_FAILED		1U
 
 /* Internal: SDEI flag bit positions */
-#define _SDEI_MAPF_DYNAMIC_SHIFT	1
-#define _SDEI_MAPF_BOUND_SHIFT		2
-#define _SDEI_MAPF_SIGNALABLE_SHIFT	3
-#define _SDEI_MAPF_PRIVATE_SHIFT	4
-#define _SDEI_MAPF_CRITICAL_SHIFT	5
-#define _SDEI_MAPF_EXPLICIT_SHIFT	6
+#define SDEI_MAPF_DYNAMIC_SHIFT_	1U
+#define SDEI_MAPF_BOUND_SHIFT_		2U
+#define SDEI_MAPF_SIGNALABLE_SHIFT_	3U
+#define SDEI_MAPF_PRIVATE_SHIFT_	4U
+#define SDEI_MAPF_CRITICAL_SHIFT_	5U
+#define SDEI_MAPF_EXPLICIT_SHIFT_	6U
 
 /* SDEI event 0 */
 #define SDEI_EVENT_0	0
 
 /* Placeholder interrupt for dynamic mapping */
-#define SDEI_DYN_IRQ	0
+#define SDEI_DYN_IRQ	0U
 
 /* SDEI flags */
 
@@ -80,20 +75,20 @@
  *
  * See also the is_map_bound() macro.
  */
-#define SDEI_MAPF_DYNAMIC	BIT(_SDEI_MAPF_DYNAMIC_SHIFT)
-#define SDEI_MAPF_BOUND		BIT(_SDEI_MAPF_BOUND_SHIFT)
-#define SDEI_MAPF_EXPLICIT	BIT(_SDEI_MAPF_EXPLICIT_SHIFT)
+#define SDEI_MAPF_DYNAMIC	BIT(SDEI_MAPF_DYNAMIC_SHIFT_)
+#define SDEI_MAPF_BOUND		BIT(SDEI_MAPF_BOUND_SHIFT_)
+#define SDEI_MAPF_EXPLICIT	BIT(SDEI_MAPF_EXPLICIT_SHIFT_)
 
-#define SDEI_MAPF_SIGNALABLE	BIT(_SDEI_MAPF_SIGNALABLE_SHIFT)
-#define SDEI_MAPF_PRIVATE	BIT(_SDEI_MAPF_PRIVATE_SHIFT)
+#define SDEI_MAPF_SIGNALABLE	BIT(SDEI_MAPF_SIGNALABLE_SHIFT_)
+#define SDEI_MAPF_PRIVATE	BIT(SDEI_MAPF_PRIVATE_SHIFT_)
 
 #define SDEI_MAPF_NORMAL	0
-#define SDEI_MAPF_CRITICAL	BIT(_SDEI_MAPF_CRITICAL_SHIFT)
+#define SDEI_MAPF_CRITICAL	BIT(SDEI_MAPF_CRITICAL_SHIFT_)
 
 /* Indices of private and shared mappings */
-#define _SDEI_MAP_IDX_PRIV	0
-#define _SDEI_MAP_IDX_SHRD	1
-#define _SDEI_MAP_IDX_MAX	2
+#define SDEI_MAP_IDX_PRIV_	0U
+#define SDEI_MAP_IDX_SHRD_	1U
+#define SDEI_MAP_IDX_MAX_	2U
 
 /* The macros below are used to identify SDEI calls from the SMC function ID */
 #define SDEI_FID_MASK		U(0xffe0)
@@ -104,22 +99,22 @@
 
 #define SDEI_EVENT_MAP(_event, _intr, _flags) \
 	{ \
-		.ev_num = _event, \
-		.intr = _intr, \
-		.map_flags = _flags \
+		.ev_num = (_event), \
+		.intr = (_intr), \
+		.map_flags = (_flags) \
 	}
 
 #define SDEI_SHARED_EVENT(_event, _intr, _flags) \
 	SDEI_EVENT_MAP(_event, _intr, _flags)
 
 #define SDEI_PRIVATE_EVENT(_event, _intr, _flags) \
-	SDEI_EVENT_MAP(_event, _intr, _flags | SDEI_MAPF_PRIVATE)
+	SDEI_EVENT_MAP(_event, _intr, (_flags) | SDEI_MAPF_PRIVATE)
 
 #define SDEI_DEFINE_EVENT_0(_intr) \
-	SDEI_PRIVATE_EVENT(SDEI_EVENT_0, _intr, SDEI_MAPF_SIGNALABLE)
+	SDEI_PRIVATE_EVENT(SDEI_EVENT_0, (_intr), SDEI_MAPF_SIGNALABLE)
 
 #define SDEI_EXPLICIT_EVENT(_event, _pri) \
-	SDEI_EVENT_MAP(_event, 0, _pri | SDEI_MAPF_EXPLICIT | SDEI_MAPF_PRIVATE)
+	SDEI_EVENT_MAP((_event), 0, (_pri) | SDEI_MAPF_EXPLICIT | SDEI_MAPF_PRIVATE)
 
 /*
  * Declare shared and private entries for each core. Also declare a global
@@ -133,12 +128,12 @@
 		[PLATFORM_CORE_COUNT * ARRAY_SIZE(_private)]; \
 	sdei_entry_t sdei_shared_event_table[ARRAY_SIZE(_shared)]; \
 	const sdei_mapping_t sdei_global_mappings[] = { \
-		[_SDEI_MAP_IDX_PRIV] = { \
-			.map = _private, \
+		[SDEI_MAP_IDX_PRIV_] = { \
+			.map = (_private), \
 			.num_maps = ARRAY_SIZE(_private) \
 		}, \
-		[_SDEI_MAP_IDX_SHRD] = { \
-			.map = _shared, \
+		[SDEI_MAP_IDX_SHRD_] = { \
+			.map = (_shared), \
 			.num_maps = ARRAY_SIZE(_shared) \
 		}, \
 	}
@@ -185,4 +180,4 @@ void sdei_init(void);
 /* Public API to dispatch an event to Normal world */
 int sdei_dispatch_event(int ev_num);
 
-#endif /* __SDEI_H__ */
+#endif /* SDEI_H */