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authorBryan O'Donoghue <bryan.odonoghue@linaro.org>2021-10-25 02:30:32 +0100
committerBryan O'Donoghue <bryan.odonoghue@linaro.org>2021-11-11 15:46:02 +0000
commitbd352c4a90400285a4c1546285491029bc8f26ce (patch)
tree747db23db23de305e6a8686bec4ebb0ff148a916
parentd1a8d61e7a979e6460545bac03451187a67ec6d3 (diff)
arm64: dts: qcom: qrb5165-rb5: Enable the IMX577 on cam1v5.16-rc1-sm8250-camss-imx577-only
The IMX577 is on CCI1/CSI2 providing four lanes of camera data. An example media-ctl pipeline for this part is: media-ctl --reset media-ctl -v -d /dev/media0 -V '"imx412 '20-001a'":0[fmt:SRGGB10/4056x3040 field:none]' media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]' media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]' media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]' media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/qrb5165-rb5.dts56
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 845eb7a6bf92..ccdaf3f17a47 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -1294,3 +1294,59 @@
drive-strength = <6>;
bias-disable;
};
+
+&camss {
+ status = "okay";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* The port index denotes CSIPHY id i.e. csiphy2 */
+ port@2 {
+ reg = <2>;
+ csiphy2_ep: endpoint {
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&imx412_ep>;
+ };
+
+ };
+ };
+};
+
+&cci1 {
+ status = "okay";
+};
+
+&cci_i2c2 {
+ camera@1a {
+ compatible = "sony,imx412";
+ reg = <0x1a>;
+
+ reset-gpios = <&tlmm 78 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default", "suspend";
+ pinctrl-0 = <&cam_sensor_mclk2_active
+ &cam_sensor_active_rst2>;
+ pinctrl-1 = <&cam_sensor_mclk2_suspend
+ &cam_sensor_suspend_rst2>;
+
+ clocks = <&camcc CAM_CC_MCLK2_CLK>;
+ clock-names = "xvclk";
+ clock-frequency = <24000000>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>;
+ dovdd-supply = <&vreg_s4a_1p8>;
+ avdd-supply = <&vreg_l7f_1p8>;
+ dvdd-supply = <&vreg_l9a_1p2>;
+
+ status = "okay";
+ port {
+ imx412_ep: endpoint {
+ clock-lanes = <1>;
+ link-frequencies = /bits/ 64 <600000000>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csiphy2_ep>;
+ };
+ };
+ };
+};