path: root/platform/linux-keystone2/openem_init.c

/*
 * Copyright (c) 2014, Linaro Limited
 * Copyright (c) 2014, Texas Instruments Incorporated
 * All rights reserved.
 *
 * SPDX-License-Identifier:     BSD-3-Clause
 */

#include <stdio.h>
#include <odp/align.h>
#include <odp/thread.h>
#include <odp_internal.h>
#include <odp/plat/ti_mcsdk.h>
#include <odp/plat/debug.h>
#include <odp/plat/ti_openem.h>
#include <ti/runtime/openem/firmware/event_machine_firmware.h>
#include <odp/pool.h>
#include <odp/buffer.h>

#define TI_EM_RH_PRIVATE_EVENT_NUM	\
		(TI_EM_PDSP_GLOBAL_DATA_SIZE / TI_EM_PRIVATE_EVENT_DSC_SIZE)
#define MY_EM_PRIVATE_DESC_BASE (TI_EM_PDSPSH_DRAM)   /* use PDSP data RAM */
#define EM_PDSP_COMM_MEM_SIZE   (0x00010000)          /* allowing 16 slots */
/* Global variables to hold virtual address of various subsystems */
extern hplib_virtualAddrInfo_T odp_vm_info;

static int openem_init_queues(ti_em_config_t *em_hw_config)
{
	Qmss_QueueHnd openem_hwqueue[TI_EM_HW_QUEUE_NUM];
	Qmss_QueueHnd qhandle;
	uint8_t allocated = 0;

	qhandle = Qmss_queueBlockOpen(openem_hwqueue,
				      Qmss_QueueType_GENERAL_PURPOSE_QUEUE,
				      TI_EM_HW_QUEUE_NUM,
				      TI_EM_HW_QUEUE_STEP);
	if (qhandle < 0) {
		odp_pr_err("Failed to open %d private queues for OpenEM: %d\n",
			   TI_EM_HW_QUEUE_NUM, qhandle);
		return -1;
	}

	odp_pr_dbg("Opened %d private queues for OpenEM\n", TI_EM_HW_QUEUE_NUM);
	em_hw_config->hw_queue_base_idx = Qmss_getQIDFromHandle(qhandle);
	odp_global->openem.private_queues_base = qhandle;

	qhandle = Qmss_queueOpen(Qmss_QueueType_GENERAL_PURPOSE_QUEUE,
				 QMSS_PARAM_NOT_SPECIFIED,
				 &allocated);
	if (qhandle < 0) {
		odp_pr_err("Failed to open OpenEM AP free queue: %d\n",
			   qhandle);
		return -1;
	}
	odp_global->openem.ap_free_region_queue = qhandle;
	em_hw_config->ap_region_queue_idx = Qmss_getQIDFromHandle(qhandle);

	qhandle = Qmss_queueOpen(Qmss_QueueType_GENERAL_PURPOSE_QUEUE,
				 QMSS_PARAM_NOT_SPECIFIED,
				 &allocated);
	if (qhandle < 0) {
		odp_pr_err("Failed to open OpenEM CD free queue: %d\n",
			   qhandle);
		return -1;
	}
	odp_global->openem.cd_free_region_queue = qhandle;
	em_hw_config->cd_region_queue_idx = Qmss_getQIDFromHandle(qhandle);
	odp_pr_dbg("Opened free queues for OpenEM\n");

	return 0;
}

static int qmss_queue_block_close(Qmss_QueueHnd hnd, int32_t num)
{
	for (; num > 0; num--) {
		if (Qmss_queueClose(hnd) == QMSS_INVALID_PARAM)
			return -1;
		hnd++; /* Assume queues in the block have consecutive handles */
	}
	return 0;
}

static int openem_close_queues(void)
{
	if (qmss_queue_block_close(odp_global->openem.private_queues_base,
				   TI_EM_HW_QUEUE_NUM))
		return -1;

	if (Qmss_queueClose(odp_global->openem.ap_free_region_queue) ==
			QMSS_INVALID_PARAM)
		return -1;
	if (Qmss_queueClose(odp_global->openem.cd_free_region_queue) ==
			QMSS_INVALID_PARAM)
		return -1;
	return 0;
}


static int openem_init_mappings(void)
{
	int res;
	void *pdsp_comm_mem;
	struct ti_em_osal_mem_mapping mapping_info = {
		.offset = 0,
		.fd = 0,
		.flags = 0,
	};

	/* Map the I/O configuration registers */
	mapping_info.paddr  = CSL_QMSS_CFG_BASE;
	mapping_info.vaddr  = (unsigned int)odp_vm_info.qmssCfgVaddr;
	mapping_info.size   = QMSS_CFG_BLK_SZ;
	res = ti_em_osal_create_mapping(TI_EM_MEM_QMSS_REGS, &mapping_info);
	if (res == -1) {
		odp_pr_err("cannot map QMSS registers\n");
		return -1;
	}

	/* Map the PDSP local memory */
	mapping_info.paddr  = HPLIBMOD_MMAP_QM_DATA_REG_MEM_OFFSET;
	mapping_info.vaddr  = (unsigned int)odp_vm_info.qmssDataVaddr;
	mapping_info.size   = QMSS_DATA_BLK_SZ;
	res = ti_em_osal_create_mapping(TI_EM_MEM_PDSP_DRAM, &mapping_info);
	if (res == -1) {
		odp_pr_err("cannot map QMSS registers\n");
		return -1;
	}

	/* Map the QMSS private descriptors */
	res = ti_em_osal_create_mapping(TI_EM_MEM_PRIVATE_DESC, &mapping_info);
	if (res == -1) {
		odp_pr_err("cannot map private descriptors\n");
		return -1;
	}
	/* Initialize the private region */
	memset((void *)ti_em_osal_mem_phys_to_virt(TI_EM_PDSPSH_DRAM,
						   TI_EM_MEM_PRIVATE_DESC),
	       0,
	       TI_EM_PDSP_GLOBAL_DATA_SIZE);

	/* Map the PSDP communication memory */
	pdsp_comm_mem = hplib_vmMemAlloc(EM_PDSP_COMM_MEM_SIZE,
					 ODP_CACHE_LINE_SIZE,
					 1);
	if (!pdsp_comm_mem) {
		odp_pr_err("cannot allocate PDSP communication memory\n");
		odp_pr_err("Check pool 1: %d\n", hplib_checkMallocArea(1));
		odp_pr_err("Remaining in pool 1: %d\n",
			   hplib_vmGetMemPoolRemainder(1));
		return -1;
	}
	odp_global->openem.pdsp_comm_mem =
			hplib_mVMVirtToPhyPoolId(pdsp_comm_mem, 1);

	mapping_info.paddr  = (phys_addr_t)odp_global->openem.pdsp_comm_mem;
	mapping_info.vaddr  = (unsigned int)pdsp_comm_mem;
	mapping_info.size   = EM_PDSP_COMM_MEM_SIZE;
	res = ti_em_osal_create_mapping(TI_EM_MEM_PDSP_COMM, &mapping_info);
	if (res == -1) {
		odp_pr_err("cannot map PDSP communication memory\n");
		return -1;
	}
	/* Initialize the PDSP communication memory */
	memset((void *)mapping_info.vaddr, 0, mapping_info.size);
	/* Store the PDSP communication memory base */
	ti_em_osal_set_pdsp_comm_mem_base(mapping_info.paddr);

	/* Public descriptors (cached if coherent I/O) */
	mapping_info.paddr  = (phys_addr_t)hplib_VM_mem_start_phy;
	mapping_info.vaddr  = (unsigned int)hplib_VM_mem_start;
	mapping_info.size   = hplib_VM_mem_end - hplib_VM_mem_start;

	/* Map the QMSS public descriptors */
	res = ti_em_osal_create_mapping(TI_EM_MEM_PUBLIC_DESC, &mapping_info);
	if (res == -1) {
		odp_pr_err("cannot map public descriptors\n");
		return -1;
	}

	odp_pr_dbg("Created all OpenEM mappings\n");
	return 0;
}

static void openem_release_mappings(void)
{
	ti_em_osal_release_mapping(TI_EM_MEM_QMSS_REGS);
	ti_em_osal_release_mapping(TI_EM_MEM_PDSP_DRAM);
	ti_em_osal_release_mapping(TI_EM_MEM_PRIVATE_DESC);
	ti_em_osal_release_mapping(TI_EM_MEM_PDSP_COMM);
	ti_em_osal_release_mapping(TI_EM_MEM_PUBLIC_DESC);
	void *ptr = hplib_mVMPhyToVirtPoolId(odp_global->openem.pdsp_comm_mem,
					     1);
	hplib_vmMemFree(ptr, EM_PDSP_COMM_MEM_SIZE, 1);
}

static int openem_add_private_memregion(ti_em_config_t *em_hw_config)
{
	Qmss_MemRegInfo mem_info;
	Int32 result;
	uint8_t *desc;
	unsigned int i;

	memset(&mem_info, 0, sizeof(Qmss_MemRegInfo));
	/** @todo: put private region settings into one place */
	mem_info.descBase = (uint32_t *)ti_em_osal_mem_phys_to_virt(
							TI_EM_PDSPSH_DRAM,
							TI_EM_MEM_PRIVATE_DESC);
	mem_info.descBasePhy = (uint32_t *)TI_EM_PDSPSH_DRAM;
	mem_info.descSize = TI_EM_PRIVATE_EVENT_DSC_SIZE;
	mem_info.descNum = TI_EM_PDSP_GLOBAL_DATA_SIZE /
			   TI_EM_PRIVATE_EVENT_DSC_SIZE;
	mem_info.manageDescFlag = Qmss_ManageDesc_UNMANAGED_DESCRIPTOR;
	mem_info.memRegion = Qmss_MemRegion_MEMORY_REGION_NOT_SPECIFIED;
	mem_info.startIndex = QMSS_START_INDEX_INTERNAL;

	result = Qmss_insertMemoryRegion(&mem_info);
	if (result < QMSS_SOK) {
		odp_pr_err("Qmss_insertMemoryRegion returned error code %d\n",
			   result);
		return -1;
	}

	odp_global->openem.desc_memregion = mem_info.memRegion;
	/*
	 * Skip one descriptor because beginning of the private memory
	 * is used for PDSP init/management.
	 */
	desc  = (uint8_t *)mem_info.descBase;
	desc += mem_info.descSize;

	/* Push private descriptors in private free queue */
	for (i = 0; i < (TI_EM_CD_PRIVATE_EVENT_NUM - 1); i++) {
		ti_em_osal_hw_queue_push(em_hw_config->cd_region_queue_idx,
					 (void *)desc,
					 TI_EM_MEM_PRIVATE_DESC);
		desc += mem_info.descSize;
	}

	/* push private descriptors in private free queue */
	for (i = 0; i < TI_EM_AP_PRIVATE_EVENT_NUM; i++) {
		ti_em_osal_hw_queue_push(em_hw_config->ap_region_queue_idx,
					 (void *)desc,
					 TI_EM_MEM_PRIVATE_DESC);
		desc += mem_info.descSize;
	}

	return 0;
}

static int openem_remove_private_memregion(void)
{
	Qmss_Result result;
	Qmss_queueEmpty(odp_global->openem.ap_free_region_queue);
	Qmss_queueEmpty(odp_global->openem.cd_free_region_queue);
	result = Qmss_removeMemoryRegion(odp_global->openem.desc_memregion,
					 QMSS_PARAM_NOT_SPECIFIED);
	if (result != QMSS_SOK) {
		odp_pr_err("Qmss_removeMemoryRegion failed with error code %d\n",
			   result);
		return -1;
	}
	return 0;
}

#define EM_SCHEDULER_FW		em_scheduler_router_fw_c663x

static int openem_init_pdsp(ti_em_config_t *em_hw_config)
{
	Qmss_Result res;

	res = Qmss_downloadFirmware(em_hw_config->pdsp_idx_tbl[0],
				    (void *)(uintptr_t)EM_SCHEDULER_FW,
				    sizeof(EM_SCHEDULER_FW));
	if (res != QMSS_SOK) {
		odp_pr_err("Failed to download firmware %p, size: %u to pdsp %d\n",
			   EM_SCHEDULER_FW,
			   sizeof(EM_SCHEDULER_FW),
			   em_hw_config->pdsp_idx_tbl[0]);
		return -1;
	}

	return 0;
}

#define TEST_QUEUES_NUM		5
#define TEST_PACKETS_PER_QUEUE	2
#define TEST_PACKETS_NUM	(TEST_QUEUES_NUM * TEST_PACKETS_PER_QUEUE)

int openem_test_atomic(void);
int openem_test_atomic(void)
{
	em_queue_t em_queue[5];
	odp_pool_t pool;
	odp_buffer_t buf;
	ti_em_packet_t *ti_em_packet;
	em_status_t ret;
	int i, j;
	odp_pool_param_t params = {
			.buf = {
				.size  = TUNE_NETAPI_DEFAULT_BUFFER_SIZE,
				.align = ODP_CACHE_LINE_SIZE,
				.num  = TEST_PACKETS_NUM,
			},
			.type  = ODP_POOL_BUFFER,
	};

	pool = odp_pool_create("test_pool", &params);
	if (pool == ODP_POOL_INVALID) {
		odp_pr_err("Can't create test pool\n");
		return -1;
	}

	/* Create EM queue */
	for (i = 0; i < TEST_QUEUES_NUM; i++) {
		em_queue[i] = em_queue_create("em test queue",
					EM_QUEUE_TYPE_ATOMIC,
					EM_QUEUE_PRIO_LOWEST + i,
					EM_QUEUE_GROUP_DEFAULT);

		if (em_queue[i] == EM_QUEUE_UNDEF) {
			odp_pr_err("Failed to create a test queue\n");
			return -1;
		}
		odp_pr_dbg("Created a test queue: %u\n", em_queue[i]);

		/* Allocated and initialize event */
		for (j = 0; j < TEST_PACKETS_PER_QUEUE; j++) {
			buf = odp_buffer_alloc(pool);
			if (!odp_buffer_is_valid(buf)) {
				odp_pr_err("Can't allocate buffer\n");
				return -1;
			}

			ti_em_packet = (ti_em_packet_t *)(void *)buf;

			ti_em_packet_set_default(ti_em_packet);

			/* Send event */
			ret = em_send(ti_em_from_packet(ti_em_packet),
				      em_queue[i]);
			if (ret != EM_OK) {
				odp_pr_err("Can't send buffer\n");
				return -1;
			}
			odp_pr_dbg("Successfully sent an event!\n");
		}
	}

	ti_em_preschedule();
	sleep(1);

	ret = EM_ERROR;
	i = 0;
	while (1) {
		ret = ti_em_dispatch_once();
		if (ret != EM_OK) {
			odp_pr_err("Can't receive buffer\n");
			return -1;
		}

		if (!(i++ % 5))
			em_atomic_processing_end();
	}

	odp_pr_dbg("Successfully received an event!\n");

	return 0;
}

int openem_test_parallel(void);
int openem_test_parallel(void)
{
	em_queue_t em_queue[5];
	odp_pool_t pool;
	odp_buffer_t buf;
	ti_em_packet_t *ti_em_packet;
	em_status_t ret;
	int i, j;
	odp_pool_param_t params = {
			.buf = {
				.size  = TUNE_NETAPI_DEFAULT_BUFFER_SIZE,
				.align = ODP_CACHE_LINE_SIZE,
				.num  = TEST_PACKETS_NUM,
			},
			.type  = ODP_POOL_BUFFER,
	};

	pool = odp_pool_create("test_pool", &params);
	if (pool == ODP_POOL_INVALID) {
		odp_pr_err("Can't create test pool\n");
		return -1;
	}

	/* Create EM queue */
	for (i = 0; i < TEST_QUEUES_NUM; i++) {
		em_queue[i] = em_queue_create("em test queue",
					EM_QUEUE_TYPE_PARALLEL,
					EM_QUEUE_PRIO_LOWEST + i,
					EM_QUEUE_GROUP_DEFAULT);

		if (em_queue[i] == EM_QUEUE_UNDEF) {
			odp_pr_err("Failed to create a test queue\n");
			return -1;
		}
		odp_pr_dbg("Created a test queue: %u\n", em_queue[i]);

		/* Allocated and initialize event */
		for (j = 0; j < TEST_PACKETS_PER_QUEUE; j++) {
			buf = odp_buffer_alloc(pool);
			if (!odp_buffer_is_valid(buf)) {
				odp_pr_err("Can't allocate buffer\n");
				return -1;
			}

			ti_em_packet = (ti_em_packet_t *)(void *)buf;

			ti_em_packet_set_default(ti_em_packet);

			/* Send event */
			ret = em_send(ti_em_from_packet(ti_em_packet),
				      em_queue[i]);
			if (ret != EM_OK) {
				odp_pr_err("Can't send buffer\n");
				return -1;
			}
			odp_pr_dbg("Successfully sent an event!\n");
		}
	}

	ti_em_preschedule();
	sleep(1);

	ret = EM_ERROR;
	while (1) {
		ret = ti_em_dispatch_once();
		if (ret != EM_OK) {
			odp_pr_err("Can't receive buffer\n");
			return -1;
		}
	}

	odp_pr_dbg("Successfully received an event!\n");

	return 0;
}

int openem_init_global(void)
{
	em_status_t ret;
	ti_em_config_t em_hw_config = {
		.chain_config_ptr = NULL,   /* Not used */
		.preload_config_ptr = NULL, /* Not used */
		.dma_idx = -1,              /* Not used */
		.dma_queue_base_idx = 0,    /* Not used */
		.hw_sem_idx = 0,
		.my_device_idx = 0,
		.my_process_idx = 0,
		.pdsp_num = 1,
		.pdsp_idx_tbl = {Qmss_PdspId_PDSP3}, /** @todo: should be allocated */
		.pool_num = 0,
		.pool_config_tbl = {},
	};

	ti_em_osal_set_core_idx(0); /** @todo: can core ID be passed here? */
	if (openem_init_queues(&em_hw_config))
		return -1;
	if (openem_init_mappings())
		return -1;
	if (openem_add_private_memregion(&em_hw_config))
		return -1;
	if (openem_init_pdsp(&em_hw_config))
		return -1;

	ret = ti_em_init_global(&em_hw_config);
	if (ret != EM_OK) {
		odp_pr_err("EM configuration and initialization failed: %u\n",
			   ret);
		return -1;
	}

	return 0;
}

int openem_init_local(int thr_id)
{
	ti_em_osal_set_core_idx(thr_id);
	if (ti_em_init_local() != EM_OK) {
		odp_pr_err("local EM initialization failed\n");
		return -1;
	}

	return 0;
}

int openem_term_local(void)
{
	if (ti_em_exit_local() != EM_OK)
		return -1;

	return 0;
}

int openem_term_global(void)
{
	em_status_t ret;

	ret = ti_em_exit_global();
	if (ret != EM_OK && ret != EM_ERR_NOT_FOUND) {
		ODP_ERR("EM exit failed: %d\n", ret);
		return -1;
	}

	if (openem_remove_private_memregion()) {
		ODP_ERR("Couldn't remove OpenEM private memregion\n");
		return -1;
	}

	openem_release_mappings();

	if (openem_close_queues()) {
		ODP_ERR("OpenEM queues close failed\n");
		return -1;
	}

	return 0;
}