1 files changed, 22 insertions, 12 deletions

diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c
index 569cd3802..a08d0de26 100644
--- a/ports/samd/samd_soc.c
+++ b/ports/samd/samd_soc.c
@@ -37,7 +37,8 @@ static void uart0_init(void) {
 
     PM->APBCMASK.bit.SERCOM0_ = 1;
     GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID_SERCOM0_CORE;
-    while (GCLK->STATUS.bit.SYNCBUSY) { }
+    while (GCLK->STATUS.bit.SYNCBUSY) {
+    }
 
     uint32_t rxpo = 3;
     uint32_t txpo = 1;
@@ -58,18 +59,21 @@ static void uart0_init(void) {
 
     #endif
 
-    while (USARTx->USART.SYNCBUSY.bit.SWRST) { }
+    while (USARTx->USART.SYNCBUSY.bit.SWRST) {
+    }
     USARTx->USART.CTRLA.bit.SWRST = 1;
-    while (USARTx->USART.SYNCBUSY.bit.SWRST) { }
+    while (USARTx->USART.SYNCBUSY.bit.SWRST) {
+    }
 
     USARTx->USART.CTRLA.reg =
         SERCOM_USART_CTRLA_DORD
         | SERCOM_USART_CTRLA_RXPO(rxpo)
         | SERCOM_USART_CTRLA_TXPO(txpo)
         | SERCOM_USART_CTRLA_MODE(1)
-        ;
+    ;
     USARTx->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN;
-    while (USARTx->USART.SYNCBUSY.bit.CTRLB) { }
+    while (USARTx->USART.SYNCBUSY.bit.CTRLB) {
+    }
     #if CPU_FREQ == 8000000
     uint32_t baud = 50437; // 115200 baud; 65536*(1 - 16 * 115200/8e6)
     #elif CPU_FREQ == 48000000
@@ -79,7 +83,8 @@ static void uart0_init(void) {
     #endif
     USARTx->USART.BAUD.bit.BAUD = baud;
     USARTx->USART.CTRLA.bit.ENABLE = 1;
-    while (USARTx->USART.SYNCBUSY.bit.ENABLE) { }
+    while (USARTx->USART.SYNCBUSY.bit.ENABLE) {
+    }
 }
 
 static void usb_init(void) {
@@ -91,7 +96,8 @@ static void usb_init(void) {
     uint8_t alt = 6; // alt G, USB
     #elif defined(MCU_SAMD51)
     GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK1;
-    while (GCLK->PCHCTRL[USB_GCLK_ID].bit.CHEN == 0) { }
+    while (GCLK->PCHCTRL[USB_GCLK_ID].bit.CHEN == 0) {
+    }
     MCLK->AHBMASK.bit.USB_ = 1;
     MCLK->APBBMASK.bit.USB_ = 1;
     uint8_t alt = 7; // alt H, USB
@@ -115,10 +121,11 @@ void samd_init(void) {
 
     // Enable DFLL48M
     SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_ENABLE;
-    while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {}
+    while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {
+    }
     SYSCTRL->DFLLMUL.reg = SYSCTRL_DFLLMUL_CSTEP(1) | SYSCTRL_DFLLMUL_FSTEP(1)
         | SYSCTRL_DFLLMUL_MUL(48000);
-    uint32_t coarse = (*((uint32_t*)FUSES_DFLL48M_COARSE_CAL_ADDR) & FUSES_DFLL48M_COARSE_CAL_Msk)
+    uint32_t coarse = (*((uint32_t *)FUSES_DFLL48M_COARSE_CAL_ADDR) & FUSES_DFLL48M_COARSE_CAL_Msk)
         >> FUSES_DFLL48M_COARSE_CAL_Pos;
     if (coarse == 0x3f) {
         coarse = 0x1f;
@@ -127,11 +134,13 @@ void samd_init(void) {
     SYSCTRL->DFLLVAL.reg = SYSCTRL_DFLLVAL_COARSE(coarse) | SYSCTRL_DFLLVAL_FINE(fine);
     SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_CCDIS | SYSCTRL_DFLLCTRL_USBCRM
         | SYSCTRL_DFLLCTRL_MODE | SYSCTRL_DFLLCTRL_ENABLE;
-    while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {}
+    while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {
+    }
 
     GCLK->GENDIV.reg = GCLK_GENDIV_ID(0) | GCLK_GENDIV_DIV(1);
     GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(0);
-    while (GCLK->STATUS.bit.SYNCBUSY) { }
+    while (GCLK->STATUS.bit.SYNCBUSY) {
+    }
 
     // Configure PA10 as output for LED
     PORT->Group[0].DIRSET.reg = 1 << 10;
@@ -139,7 +148,8 @@ void samd_init(void) {
     #elif defined(MCU_SAMD51)
 
     GCLK->GENCTRL[1].reg = 1 << GCLK_GENCTRL_DIV_Pos | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL;
-    while (GCLK->SYNCBUSY.bit.GENCTRL1) { }
+    while (GCLK->SYNCBUSY.bit.GENCTRL1) {
+    }
 
     // Configure PA22 as output for LED
     PORT->Group[0].DIRSET.reg = 1 << 22;