diff options
| -rw-r--r-- | make/Makefile | 2 | ||||
| -rw-r--r-- | src/cpu/aarch64/vm/aarch64Test.cpp | 2 | ||||
| -rw-r--r-- | src/cpu/aarch64/vm/assembler_aarch64.cpp | 29 | ||||
| -rw-r--r-- | src/cpu/aarch64/vm/assembler_aarch64.hpp | 17 | ||||
| -rw-r--r-- | src/cpu/aarch64/vm/interp_masm_aarch64.cpp | 5 |
5 files changed, 22 insertions, 33 deletions
diff --git a/make/Makefile b/make/Makefile index 62ce474d6..d75eb441c 100644 --- a/make/Makefile +++ b/make/Makefile @@ -110,8 +110,8 @@ all_debug: universal_debug else ifeq ($(SRCARCH),aarch64) all_debug: jvmg1 docs export_debug -else all_product: $(COMMON_VM_PRODUCT_TARGETS) +else all_fastdebug: $(COMMON_VM_FASTDEBUG_TARGETS) all_debug: $(COMMON_VM_DEBUG_TARGETS) endif diff --git a/src/cpu/aarch64/vm/aarch64Test.cpp b/src/cpu/aarch64/vm/aarch64Test.cpp index 46ecac8ea..0c2f48661 100644 --- a/src/cpu/aarch64/vm/aarch64Test.cpp +++ b/src/cpu/aarch64/vm/aarch64Test.cpp @@ -20,7 +20,7 @@ void aarch64TestHook() BufferBlob* b = BufferBlob::create("aarch64Test", 500000); CodeBuffer code(b); MacroAssembler _masm(&code); - entry(_masm.code()); + entry(&code); // dive now before we hit all the Unimplemented() calls // exit(0); diff --git a/src/cpu/aarch64/vm/assembler_aarch64.cpp b/src/cpu/aarch64/vm/assembler_aarch64.cpp index db0d990fb..b190262b2 100644 --- a/src/cpu/aarch64/vm/assembler_aarch64.cpp +++ b/src/cpu/aarch64/vm/assembler_aarch64.cpp @@ -32,7 +32,9 @@ #include "assembler_aarch64.hpp" #include "interpreter/interpreter.hpp" -const unsigned long Assembler::asm_bp = 0x7fffee1601f8; +#ifndef PRODUCT +const unsigned long Assembler::asm_bp = 0x00007fffee07a730; +#endif #include "compiler/disassembler.hpp" #include "memory/resourceArea.hpp" @@ -59,6 +61,13 @@ const unsigned long Assembler::asm_bp = 0x7fffee1601f8; extern "C" void entry(CodeBuffer *cb); #define __ _masm. +#ifdef PRODUCT +#define BLOCK_COMMENT(str) /* nothing */ +#else +#define BLOCK_COMMENT(str) block_comment(str) +#endif + +#define BIND(label) bind(label); __ BLOCK_COMMENT(#label ":") static float unpack(unsigned value); @@ -1174,15 +1183,6 @@ Disassembly of section .text: } assert(ok, "Assembler smoke test failed"); } -#endif // ASSERT - -#ifdef PRODUCT -#define BLOCK_COMMENT(str) /* nothing */ -#else -#define BLOCK_COMMENT(str) block_comment(str) -#endif - -#define BIND(label) bind(label); __ BLOCK_COMMENT(#label ":") #ifndef PRODUCT { @@ -1218,8 +1218,9 @@ Disassembly of section .text: __ push(3, sp); __ pop(3, sp); -} #endif // PRODUCT +#endif // ASSERT +} #undef __ @@ -1250,7 +1251,7 @@ void Address::lea(MacroAssembler *as, Register r) const { break; } case base_plus_offset_reg: { - __ add(r, _base, _index, _ext.op(), MAX(_ext.shift(), 0) ); + __ add(r, _base, _index, _ext.op(), MAX(_ext.shift(), 0)); break; } case literal: { @@ -1944,9 +1945,9 @@ RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_ad void MacroAssembler:: notify(int type) { if (type == bytecode_start) { - set_last_Java_frame(esp, rfp, (address)NULL); + // set_last_Java_frame(esp, rfp, (address)NULL); Assembler:: notify(type); - reset_last_Java_frame(true, false); + // reset_last_Java_frame(true, false); } else Assembler:: notify(type); diff --git a/src/cpu/aarch64/vm/assembler_aarch64.hpp b/src/cpu/aarch64/vm/assembler_aarch64.hpp index 08a653624..710d62d96 100644 --- a/src/cpu/aarch64/vm/assembler_aarch64.hpp +++ b/src/cpu/aarch64/vm/assembler_aarch64.hpp @@ -297,7 +297,6 @@ class PrePost { Register _r; public: PrePost(Register reg, int o) : _r(reg), _offset(o) { } - PrePost(Register reg, ByteSize disp) : _r(reg), _offset(in_bytes(disp)) { } int offset() { return _offset; } Register reg() { return _r; } }; @@ -305,12 +304,10 @@ public: class Pre : public PrePost { public: Pre(Register reg, int o) : PrePost(reg, o) { } - Pre(Register reg, ByteSize disp) : PrePost(reg, disp) { } }; class Post : public PrePost { public: Post(Register reg, int o) : PrePost(reg, o) { } - Post(Register reg, ByteSize disp) : PrePost(reg, disp) { } }; namespace ext @@ -385,9 +382,11 @@ class Address VALUE_OBJ_CLASS_SPEC { : _mode(base_plus_offset), _base(r), _offset(o), _index(noreg) { } Address(Register r, unsigned long o) : _mode(base_plus_offset), _base(r), _offset(o), _index(noreg) { } +#ifdef ASSERT Address(Register r, ByteSize disp) : _mode(base_plus_offset), _base(r), _offset(in_bytes(disp)), _index(noreg) { } +#endif Address(Register r, Register r1, extend ext = lsl()) : _mode(base_plus_offset_reg), _base(r), _index(r1), _ext(ext), _offset(0) { } @@ -1265,6 +1264,7 @@ public: void add_sub_extended_reg(unsigned op, unsigned decode, Register Rd, Register Rn, Register Rm, unsigned opt, ext::operation option, unsigned imm) { + guarantee(imm <= 4, "shift amount must be < 4"); f(op, 31, 29), f(decode, 28, 24), f(opt, 23, 22), f(1, 21); f(option, 15, 13), f(imm, 12, 10); } @@ -2450,16 +2450,6 @@ public: DEBUG_ONLY(void verify_heapbase(const char* msg);) - // Int division/remainder for Java - // (as idivl, but checks for special case as described in JVM spec.) - // returns idivl instruction offset for implicit exception handling - int corrected_idivl(Register reg); - - // Long division/remainder for Java - // (as idivq, but checks for special case as described in JVM spec.) - // returns idivq instruction offset for implicit exception handling - int corrected_idivq(Register reg); - // currently unimplemented #if 0 void int3(); @@ -2748,7 +2738,6 @@ public: // Arithmetics - void addptr(Address dst, int32_t src) { Unimplemented(); } // unimplemented #if 0 diff --git a/src/cpu/aarch64/vm/interp_masm_aarch64.cpp b/src/cpu/aarch64/vm/interp_masm_aarch64.cpp index 36c4e48bd..3ee2c3cfc 100644 --- a/src/cpu/aarch64/vm/interp_masm_aarch64.cpp +++ b/src/cpu/aarch64/vm/interp_masm_aarch64.cpp @@ -104,13 +104,12 @@ void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, assert_different_registers(cache, rcpool); get_cache_index_at_bcp(index, bcp_offset, index_size); assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below"); - // convert from field index to ConstantPoolCacheEntry index - lsl(index, index, 2); + // convert from field index to ConstantPoolCacheEntry // aarch64 already has the cache in rcpool so there is no need to // install it in cache. instead we pre-add the indexed offset to // rcpool and return it in cache. All clients of this method need to // be modified accordingly. - lea(cache, Address(rcpool, index, Address::lsl(3))); + add(cache, rcpool, index, Assembler::LSL, 5); } |