diff options
25 files changed, 106 insertions, 259 deletions
diff --git a/src/cpu/sparc/vm/sparc.ad b/src/cpu/sparc/vm/sparc.ad index f51a559ca..4c5a9256c 100644 --- a/src/cpu/sparc/vm/sparc.ad +++ b/src/cpu/sparc/vm/sparc.ad @@ -3314,10 +3314,9 @@ op_attrib op_cost(1); // Required cost attribute //----------Instruction Attributes--------------------------------------------- ins_attrib ins_cost(DEFAULT_COST); // Required cost attribute -ins_attrib ins_size(32); // Required size attribute (in bits) -ins_attrib ins_pc_relative(0); // Required PC Relative flag -ins_attrib ins_short_branch(0); // Required flag: is this instruction a - // non-matching short branch variant of some +ins_attrib ins_size(32); // Required size attribute (in bits) +ins_attrib ins_short_branch(0); // Required flag: is this instruction a + // non-matching short branch variant of some // long branch? //----------OPERANDS----------------------------------------------------------- @@ -9182,7 +9181,6 @@ instruct jumpXtnd(iRegX switch_val, o7RegI table) %{ __ jmp(label_reg, G0); __ delayed()->nop(); %} - ins_pc_relative(1); ins_pipe(ialu_reg_reg); %} @@ -9199,7 +9197,6 @@ instruct branch(label labl) %{ __ ba(*L); __ delayed()->nop(); %} - ins_pc_relative(1); ins_pipe(br); %} @@ -9213,7 +9210,6 @@ instruct branchCon(cmpOp cmp, flagsReg icc, label labl) %{ format %{ "BP$cmp $icc,$labl" %} // Prim = bits 24-22, Secnd = bits 31-30 ins_encode( enc_bp( labl, cmp, icc ) ); - ins_pc_relative(1); ins_pipe(br_cc); %} @@ -9230,7 +9226,6 @@ instruct branchCon_regI(cmpOp_reg cmp, iRegI op1, immI0 zero, label labl) %{ ins_cost(BRANCH_COST); format %{ "BR$cmp $op1,$labl" %} ins_encode( enc_bpr( labl, cmp, op1 ) ); - ins_pc_relative(1); ins_pipe(br_reg); %} @@ -9243,7 +9238,6 @@ instruct branchCon_regP(cmpOp_reg cmp, iRegP op1, immP0 null, label labl) %{ ins_cost(BRANCH_COST); format %{ "BR$cmp $op1,$labl" %} ins_encode( enc_bpr( labl, cmp, op1 ) ); - ins_pc_relative(1); ins_pipe(br_reg); %} @@ -9256,7 +9250,6 @@ instruct branchCon_regL(cmpOp_reg cmp, iRegL op1, immL0 zero, label labl) %{ ins_cost(BRANCH_COST); format %{ "BR$cmp $op1,$labl" %} ins_encode( enc_bpr( labl, cmp, op1 ) ); - ins_pc_relative(1); ins_pipe(br_reg); %} @@ -9267,7 +9260,6 @@ instruct branchConU(cmpOpU cmp, flagsRegU icc, label labl) %{ format %{ "BP$cmp $icc,$labl" %} // Prim = bits 24-22, Secnd = bits 31-30 ins_encode( enc_bp( labl, cmp, icc ) ); - ins_pc_relative(1); ins_pipe(br_cc); %} @@ -9286,7 +9278,6 @@ instruct branchConP(cmpOpP cmp, flagsRegP pcc, label labl) %{ __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::ptr_cc, predict_taken, *L); __ delayed()->nop(); %} - ins_pc_relative(1); ins_pipe(br_cc); %} @@ -9305,7 +9296,6 @@ instruct branchConF(cmpOpF cmp, flagsRegF fcc, label labl) %{ __ fbp( (Assembler::Condition)($cmp$$cmpcode), false, (Assembler::CC)($fcc$$reg), predict_taken, *L); __ delayed()->nop(); %} - ins_pc_relative(1); ins_pipe(br_fcc); %} @@ -9318,7 +9308,6 @@ instruct branchLoopEnd(cmpOp cmp, flagsReg icc, label labl) %{ format %{ "BP$cmp $icc,$labl\t! Loop end" %} // Prim = bits 24-22, Secnd = bits 31-30 ins_encode( enc_bp( labl, cmp, icc ) ); - ins_pc_relative(1); ins_pipe(br_cc); %} @@ -9331,7 +9320,6 @@ instruct branchLoopEndU(cmpOpU cmp, flagsRegU icc, label labl) %{ format %{ "BP$cmp $icc,$labl\t! Loop end" %} // Prim = bits 24-22, Secnd = bits 31-30 ins_encode( enc_bp( labl, cmp, icc ) ); - ins_pc_relative(1); ins_pipe(br_cc); %} @@ -9371,7 +9359,6 @@ instruct branchCon_long(cmpOp cmp, flagsRegL xcc, label labl) %{ __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::xcc, predict_taken, *L); __ delayed()->nop(); %} - ins_pc_relative(1); ins_pipe(br_cc); %} @@ -9499,7 +9486,6 @@ instruct CallStaticJavaDirect( method meth ) %{ ins_cost(CALL_COST); format %{ "CALL,static ; NOP ==> " %} ins_encode( Java_Static_Call( meth ), call_epilog ); - ins_pc_relative(1); ins_pipe(simple_call); %} @@ -9513,7 +9499,6 @@ instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{ ins_cost(CALL_COST); format %{ "CALL,static/MethodHandle" %} ins_encode(preserve_SP, Java_Static_Call(meth), restore_SP, call_epilog); - ins_pc_relative(1); ins_pipe(simple_call); %} @@ -9526,7 +9511,6 @@ instruct CallDynamicJavaDirect( method meth ) %{ format %{ "SET (empty),R_G5\n\t" "CALL,dynamic ; NOP ==> " %} ins_encode( Java_Dynamic_Call( meth ), call_epilog ); - ins_pc_relative(1); ins_pipe(call); %} @@ -9538,7 +9522,6 @@ instruct CallRuntimeDirect(method meth, l7RegP l7) %{ format %{ "CALL,runtime" %} ins_encode( Java_To_Runtime( meth ), call_epilog, adjust_long_from_native_call ); - ins_pc_relative(1); ins_pipe(simple_call); %} @@ -9551,7 +9534,6 @@ instruct CallLeafDirect(method meth, l7RegP l7) %{ ins_encode( Java_To_Runtime( meth ), call_epilog, adjust_long_from_native_call ); - ins_pc_relative(1); ins_pipe(simple_call); %} @@ -9564,7 +9546,6 @@ instruct CallLeafNoFPDirect(method meth, l7RegP l7) %{ ins_encode( Java_To_Runtime( meth ), call_epilog, adjust_long_from_native_call ); - ins_pc_relative(1); ins_pipe(simple_call); %} diff --git a/src/cpu/x86/vm/x86_32.ad b/src/cpu/x86/vm/x86_32.ad index a369e2f48..046d723d9 100644 --- a/src/cpu/x86/vm/x86_32.ad +++ b/src/cpu/x86/vm/x86_32.ad @@ -4496,7 +4496,6 @@ op_attrib op_cost(0); // Required cost attribute //----------Instruction Attributes--------------------------------------------- ins_attrib ins_cost(100); // Required cost attribute ins_attrib ins_size(8); // Required size attribute (in bits) -ins_attrib ins_pc_relative(0); // Required PC Relative flag ins_attrib ins_short_branch(0); // Required flag: is this instruction a // non-matching short branch variant of some // long branch? @@ -13047,7 +13046,6 @@ instruct jumpXtnd(eRegI switch_val) %{ Address index(noreg, $switch_val$$Register, Address::times_1); __ jump(ArrayAddress($constantaddress, index)); %} - ins_pc_relative(1); ins_pipe(pipe_jmp); %} @@ -13062,7 +13060,6 @@ instruct jmpDir(label labl) %{ opcode(0xE9); ins_encode( OpcP, Lbl( labl ) ); ins_pipe( pipe_jmp ); - ins_pc_relative(1); %} // Jump Direct Conditional - Label defines a relative address from Jcc+1 @@ -13076,7 +13073,6 @@ instruct jmpCon(cmpOp cop, eFlagsReg cr, label labl) %{ opcode(0x0F, 0x80); ins_encode( Jcc( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); %} // Jump Direct Conditional - Label defines a relative address from Jcc+1 @@ -13090,7 +13086,6 @@ instruct jmpLoopEnd(cmpOp cop, eFlagsReg cr, label labl) %{ opcode(0x0F, 0x80); ins_encode( Jcc( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); %} // Jump Direct Conditional - Label defines a relative address from Jcc+1 @@ -13104,7 +13099,6 @@ instruct jmpLoopEndU(cmpOpU cop, eFlagsRegU cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode( Jcc( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); %} instruct jmpLoopEndUCF(cmpOpUCF cop, eFlagsRegUCF cmp, label labl) %{ @@ -13117,7 +13111,6 @@ instruct jmpLoopEndUCF(cmpOpUCF cop, eFlagsRegUCF cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode( Jcc( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); %} // Jump Direct Conditional - using unsigned comparison @@ -13131,7 +13124,6 @@ instruct jmpConU(cmpOpU cop, eFlagsRegU cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} instruct jmpConUCF(cmpOpUCF cop, eFlagsRegUCF cmp, label labl) %{ @@ -13144,7 +13136,6 @@ instruct jmpConUCF(cmpOpUCF cop, eFlagsRegUCF cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} instruct jmpConUCF2(cmpOpUCF2 cop, eFlagsRegUCF cmp, label labl) %{ @@ -13186,7 +13177,6 @@ instruct jmpConUCF2(cmpOpUCF2 cop, eFlagsRegUCF cmp, label labl) %{ emit_d32(cbuf, disp); %} ins_pipe(pipe_jcc); - ins_pc_relative(1); %} // ============================================================================ @@ -13254,7 +13244,6 @@ instruct jmpDir_short(label labl) %{ opcode(0xEB); ins_encode( OpcP, LblShort( labl ) ); ins_pipe( pipe_jmp ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13269,7 +13258,6 @@ instruct jmpCon_short(cmpOp cop, eFlagsReg cr, label labl) %{ opcode(0x70); ins_encode( JccShort( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13284,7 +13272,6 @@ instruct jmpLoopEnd_short(cmpOp cop, eFlagsReg cr, label labl) %{ opcode(0x70); ins_encode( JccShort( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13299,7 +13286,6 @@ instruct jmpLoopEndU_short(cmpOpU cop, eFlagsRegU cmp, label labl) %{ opcode(0x70); ins_encode( JccShort( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13313,7 +13299,6 @@ instruct jmpLoopEndUCF_short(cmpOpUCF cop, eFlagsRegUCF cmp, label labl) %{ opcode(0x70); ins_encode( JccShort( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13328,7 +13313,6 @@ instruct jmpConU_short(cmpOpU cop, eFlagsRegU cmp, label labl) %{ opcode(0x70); ins_encode( JccShort( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13342,7 +13326,6 @@ instruct jmpConUCF_short(cmpOpUCF cop, eFlagsRegUCF cmp, label labl) %{ opcode(0x70); ins_encode( JccShort( cop, labl) ); ins_pipe( pipe_jcc ); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13382,7 +13365,6 @@ instruct jmpConUCF2_short(cmpOpUCF2 cop, eFlagsRegUCF cmp, label labl) %{ assert(-128 <= parity_disp && parity_disp <= 127, "Displacement too large for short jmp"); %} ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -13855,7 +13837,6 @@ instruct CallStaticJavaDirect(method meth) %{ call_epilog, post_call_FPU ); ins_pipe( pipe_slow ); - ins_pc_relative(1); ins_alignment(4); %} @@ -13879,7 +13860,6 @@ instruct CallStaticJavaHandle(method meth, eBPRegP ebp_mh_SP_save) %{ call_epilog, post_call_FPU ); ins_pipe( pipe_slow ); - ins_pc_relative(1); ins_alignment(4); %} @@ -13899,7 +13879,6 @@ instruct CallDynamicJavaDirect(method meth) %{ call_epilog, post_call_FPU ); ins_pipe( pipe_slow ); - ins_pc_relative(1); ins_alignment(4); %} @@ -13917,7 +13896,6 @@ instruct CallRuntimeDirect(method meth) %{ Java_To_Runtime( meth ), post_call_FPU ); ins_pipe( pipe_slow ); - ins_pc_relative(1); %} // Call runtime without safepoint @@ -13933,7 +13911,6 @@ instruct CallLeafDirect(method meth) %{ Java_To_Runtime( meth ), Verify_FPU_For_Leaf, post_call_FPU ); ins_pipe( pipe_slow ); - ins_pc_relative(1); %} instruct CallLeafNoFPDirect(method meth) %{ @@ -13945,7 +13922,6 @@ instruct CallLeafNoFPDirect(method meth) %{ opcode(0xE8); /* E8 cd */ ins_encode(Java_To_Runtime(meth)); ins_pipe( pipe_slow ); - ins_pc_relative(1); %} @@ -14024,7 +14000,6 @@ instruct cmpFastLock( eFlagsReg cr, eRegP object, eRegP box, eAXRegI tmp, eRegP format %{ "FASTLOCK $object, $box KILLS $tmp,$scr" %} ins_encode( Fast_Lock(object,box,tmp,scr) ); ins_pipe( pipe_slow ); - ins_pc_relative(1); %} instruct cmpFastUnlock( eFlagsReg cr, eRegP object, eAXRegP box, eRegP tmp ) %{ @@ -14034,7 +14009,6 @@ instruct cmpFastUnlock( eFlagsReg cr, eRegP object, eAXRegP box, eRegP tmp ) %{ format %{ "FASTUNLOCK $object, $box, $tmp" %} ins_encode( Fast_Unlock(object,box,tmp) ); ins_pipe( pipe_slow ); - ins_pc_relative(1); %} diff --git a/src/cpu/x86/vm/x86_64.ad b/src/cpu/x86/vm/x86_64.ad index 174b2bf11..1d5537cd5 100644 --- a/src/cpu/x86/vm/x86_64.ad +++ b/src/cpu/x86/vm/x86_64.ad @@ -4013,7 +4013,6 @@ op_attrib op_cost(0); // Required cost attribute //----------Instruction Attributes--------------------------------------------- ins_attrib ins_cost(100); // Required cost attribute ins_attrib ins_size(8); // Required size attribute (in bits) -ins_attrib ins_pc_relative(0); // Required PC Relative flag ins_attrib ins_short_branch(0); // Required flag: is this instruction // a non-matching short branch variant // of some long branch? @@ -7547,7 +7546,6 @@ instruct jumpXtnd_offset(rRegL switch_val, immI2 shift, rRegI dest) %{ __ jmp(dispatch); %} ins_pipe(pipe_jmp); - ins_pc_relative(1); %} instruct jumpXtnd_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) %{ @@ -7568,7 +7566,6 @@ instruct jumpXtnd_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) __ jmp(dispatch); %} ins_pipe(pipe_jmp); - ins_pc_relative(1); %} instruct jumpXtnd(rRegL switch_val, rRegI dest) %{ @@ -7589,7 +7586,6 @@ instruct jumpXtnd(rRegL switch_val, rRegI dest) %{ __ jmp(dispatch); %} ins_pipe(pipe_jmp); - ins_pc_relative(1); %} // Conditional move @@ -12020,7 +12016,6 @@ instruct jmpDir(label labl) opcode(0xE9); ins_encode(OpcP, Lbl(labl)); ins_pipe(pipe_jmp); - ins_pc_relative(1); %} // Jump Direct Conditional - Label defines a relative address from Jcc+1 @@ -12035,7 +12030,6 @@ instruct jmpCon(cmpOp cop, rFlagsReg cr, label labl) opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} // Jump Direct Conditional - Label defines a relative address from Jcc+1 @@ -12050,7 +12044,6 @@ instruct jmpLoopEnd(cmpOp cop, rFlagsReg cr, label labl) opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} // Jump Direct Conditional - Label defines a relative address from Jcc+1 @@ -12064,7 +12057,6 @@ instruct jmpLoopEndU(cmpOpU cop, rFlagsRegU cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} instruct jmpLoopEndUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{ @@ -12077,7 +12069,6 @@ instruct jmpLoopEndUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} // Jump Direct Conditional - using unsigned comparison @@ -12091,7 +12082,6 @@ instruct jmpConU(cmpOpU cop, rFlagsRegU cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} instruct jmpConUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{ @@ -12104,7 +12094,6 @@ instruct jmpConUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{ opcode(0x0F, 0x80); ins_encode(Jcc(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); %} instruct jmpConUCF2(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{ @@ -12144,7 +12133,6 @@ instruct jmpConUCF2(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{ emit_d32(cbuf, disp); %} ins_pipe(pipe_jcc); - ins_pc_relative(1); %} // ============================================================================ @@ -12221,7 +12209,6 @@ instruct jmpDir_short(label labl) %{ opcode(0xEB); ins_encode(OpcP, LblShort(labl)); ins_pipe(pipe_jmp); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12236,7 +12223,6 @@ instruct jmpCon_short(cmpOp cop, rFlagsReg cr, label labl) %{ opcode(0x70); ins_encode(JccShort(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12251,7 +12237,6 @@ instruct jmpLoopEnd_short(cmpOp cop, rFlagsReg cr, label labl) %{ opcode(0x70); ins_encode(JccShort(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12266,7 +12251,6 @@ instruct jmpLoopEndU_short(cmpOpU cop, rFlagsRegU cmp, label labl) %{ opcode(0x70); ins_encode(JccShort(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12280,7 +12264,6 @@ instruct jmpLoopEndUCF_short(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{ opcode(0x70); ins_encode(JccShort(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12295,7 +12278,6 @@ instruct jmpConU_short(cmpOpU cop, rFlagsRegU cmp, label labl) %{ opcode(0x70); ins_encode(JccShort(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12309,7 +12291,6 @@ instruct jmpConUCF_short(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{ opcode(0x70); ins_encode(JccShort(cop, labl)); ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12349,7 +12330,6 @@ instruct jmpConUCF2_short(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{ assert(-128 <= parity_disp && parity_disp <= 127, "Displacement too large for short jmp"); %} ins_pipe(pipe_jcc); - ins_pc_relative(1); ins_short_branch(1); %} @@ -12366,7 +12346,6 @@ instruct cmpFastLock(rFlagsReg cr, format %{ "fastlock $object,$box,$tmp,$scr" %} ins_encode(Fast_Lock(object, box, tmp, scr)); ins_pipe(pipe_slow); - ins_pc_relative(1); %} instruct cmpFastUnlock(rFlagsReg cr, @@ -12379,7 +12358,6 @@ instruct cmpFastUnlock(rFlagsReg cr, format %{ "fastunlock $object, $box, $tmp" %} ins_encode(Fast_Unlock(object, box, tmp)); ins_pipe(pipe_slow); - ins_pc_relative(1); %} @@ -12432,7 +12410,6 @@ instruct CallStaticJavaDirect(method meth) %{ opcode(0xE8); /* E8 cd */ ins_encode(Java_Static_Call(meth), call_epilog); ins_pipe(pipe_slow); - ins_pc_relative(1); ins_alignment(4); %} @@ -12454,7 +12431,6 @@ instruct CallStaticJavaHandle(method meth, rbp_RegP rbp_mh_SP_save) %{ restore_SP, call_epilog); ins_pipe(pipe_slow); - ins_pc_relative(1); ins_alignment(4); %} @@ -12472,7 +12448,6 @@ instruct CallDynamicJavaDirect(method meth) opcode(0xE8); /* E8 cd */ ins_encode(Java_Dynamic_Call(meth), call_epilog); ins_pipe(pipe_slow); - ins_pc_relative(1); ins_alignment(4); %} @@ -12487,7 +12462,6 @@ instruct CallRuntimeDirect(method meth) opcode(0xE8); /* E8 cd */ ins_encode(Java_To_Runtime(meth)); ins_pipe(pipe_slow); - ins_pc_relative(1); %} // Call runtime without safepoint @@ -12501,7 +12475,6 @@ instruct CallLeafDirect(method meth) opcode(0xE8); /* E8 cd */ ins_encode(Java_To_Runtime(meth)); ins_pipe(pipe_slow); - ins_pc_relative(1); %} // Call runtime without safepoint @@ -12515,7 +12488,6 @@ instruct CallLeafNoFPDirect(method meth) opcode(0xE8); /* E8 cd */ ins_encode(Java_To_Runtime(meth)); ins_pipe(pipe_slow); - ins_pc_relative(1); %} // Return Instruction diff --git a/src/share/vm/adlc/adlparse.cpp b/src/share/vm/adlc/adlparse.cpp index c5381dfe2..a730a0a8f 100644 --- a/src/share/vm/adlc/adlparse.cpp +++ b/src/share/vm/adlc/adlparse.cpp @@ -126,9 +126,6 @@ void ADLParser::parse() { if (_globalNames[AttributeForm::_ins_cost] == NULL) { parse_err(SEMERR, "Did not declare 'ins_cost' attribute"); } - if (_globalNames[AttributeForm::_ins_pc_relative] == NULL) { - parse_err(SEMERR, "Did not declare 'ins_pc_relative' attribute"); - } if (_globalNames[AttributeForm::_op_cost] == NULL) { parse_err(SEMERR, "Did not declare 'op_cost' attribute"); } diff --git a/src/share/vm/adlc/archDesc.cpp b/src/share/vm/adlc/archDesc.cpp index e751b54db..fb94d81cc 100644 --- a/src/share/vm/adlc/archDesc.cpp +++ b/src/share/vm/adlc/archDesc.cpp @@ -335,6 +335,9 @@ void ArchDesc::inspectInstructions() { while (attr != NULL) { if (strcmp(attr->_ident,"ins_short_branch") == 0 && attr->int_val(*this) != 0) { + if (!instr->is_ideal_branch() || instr->label_position() == -1) { + syntax_err(instr->_linenum, "%s: Only short branch to a label is supported\n", rootOp); + } instr->set_short_branch(true); } else if (strcmp(attr->_ident,"ins_alignment") == 0 && attr->int_val(*this) != 0) { diff --git a/src/share/vm/adlc/formssel.cpp b/src/share/vm/adlc/formssel.cpp index c332d7351..f389f152a 100644 --- a/src/share/vm/adlc/formssel.cpp +++ b/src/share/vm/adlc/formssel.cpp @@ -291,15 +291,6 @@ int InstructForm::is_tls_instruction() const { } -// Return 'true' if this instruction matches an ideal 'Copy*' node -bool InstructForm::is_ideal_unlock() const { - return _matrule ? _matrule->is_ideal_unlock() : false; -} - -bool InstructForm::is_ideal_call_leaf() const { - return _matrule ? _matrule->is_ideal_call_leaf() : false; -} - // Return 'true' if this instruction matches an ideal 'If' node bool InstructForm::is_ideal_if() const { if( _matrule == NULL ) return false; @@ -1094,6 +1085,9 @@ const char *InstructForm::mach_base_class(FormDict &globals) const { else if (is_ideal_if()) { return "MachIfNode"; } + else if (is_ideal_goto()) { + return "MachGotoNode"; + } else if (is_ideal_fastlock()) { return "MachFastLockNode"; } @@ -2706,7 +2700,6 @@ void ConstructRule::output(FILE *fp) { int AttributeForm::_insId = 0; // start counter at 0 int AttributeForm::_opId = 0; // start counter at 0 const char* AttributeForm::_ins_cost = "ins_cost"; // required name -const char* AttributeForm::_ins_pc_relative = "ins_pc_relative"; const char* AttributeForm::_op_cost = "op_cost"; // required name AttributeForm::AttributeForm(char *attr, int type, char *attrdef) @@ -3929,19 +3922,6 @@ int MatchRule::is_expensive() const { return 0; } -bool MatchRule::is_ideal_unlock() const { - if( !_opType ) return false; - return !strcmp(_opType,"Unlock") || !strcmp(_opType,"FastUnlock"); -} - - -bool MatchRule::is_ideal_call_leaf() const { - if( !_opType ) return false; - return !strcmp(_opType,"CallLeaf") || - !strcmp(_opType,"CallLeafNoFP"); -} - - bool MatchRule::is_ideal_if() const { if( !_opType ) return false; return diff --git a/src/share/vm/adlc/formssel.hpp b/src/share/vm/adlc/formssel.hpp index 88ba70267..50d7a7063 100644 --- a/src/share/vm/adlc/formssel.hpp +++ b/src/share/vm/adlc/formssel.hpp @@ -145,8 +145,6 @@ public: virtual int is_empty_encoding() const; // _size=0 and/or _insencode empty virtual int is_tls_instruction() const; // tlsLoadP rule or ideal ThreadLocal virtual int is_ideal_copy() const; // node matches ideal 'Copy*' - virtual bool is_ideal_unlock() const; // node matches ideal 'Unlock' - virtual bool is_ideal_call_leaf() const; // node matches ideal 'CallLeaf' virtual bool is_ideal_if() const; // node matches ideal 'If' virtual bool is_ideal_fastlock() const; // node matches 'FastLock' virtual bool is_ideal_membar() const; // node matches ideal 'MemBarXXX' @@ -857,7 +855,6 @@ public: int type() { return id;} // return this object's "id" static const char* _ins_cost; // "ins_cost" - static const char* _ins_pc_relative; // "ins_pc_relative" static const char* _op_cost; // "op_cost" void dump(); // Debug printer @@ -1002,8 +999,6 @@ public: bool is_chain_rule(FormDict &globals) const; int is_ideal_copy() const; int is_expensive() const; // node matches ideal 'CosD' - bool is_ideal_unlock() const; - bool is_ideal_call_leaf() const; bool is_ideal_if() const; // node matches ideal 'If' bool is_ideal_fastlock() const; // node matches ideal 'FastLock' bool is_ideal_jump() const; // node matches ideal 'Jump' diff --git a/src/share/vm/adlc/output_h.cpp b/src/share/vm/adlc/output_h.cpp index a1b567a68..f16cffc6a 100644 --- a/src/share/vm/adlc/output_h.cpp +++ b/src/share/vm/adlc/output_h.cpp @@ -1536,16 +1536,12 @@ void ArchDesc::declareClasses(FILE *fp) { // Each instruction attribute results in a virtual call of same name. // The ins_cost is not handled here. Attribute *attr = instr->_attribs; - bool is_pc_relative = false; while (attr != NULL) { if (strcmp(attr->_ident,"ins_cost") && - strcmp(attr->_ident,"ins_pc_relative")) { + strcmp(attr->_ident,"ins_short_branch")) { fprintf(fp," int %s() const { return %s; }\n", attr->_ident, attr->_val); } - // Check value for ins_pc_relative, and if it is true (1), set the flag - if (!strcmp(attr->_ident,"ins_pc_relative") && attr->int_val(*this) != 0) - is_pc_relative = true; attr = (Attribute *)attr->_next; } @@ -1657,20 +1653,10 @@ void ArchDesc::declareClasses(FILE *fp) { fprintf(fp," _num_opnds = %d; _opnds = _opnd_array; ", instr->num_opnds()); bool node_flags_set = false; - // flag: if this instruction matches an ideal 'Goto' node - if ( instr->is_ideal_goto() ) { - fprintf(fp,"init_flags(Flag_is_Goto"); - node_flags_set = true; - } - // flag: if this instruction matches an ideal 'Copy*' node if ( instr->is_ideal_copy() != 0 ) { - if ( node_flags_set ) { - fprintf(fp," | Flag_is_Copy"); - } else { - fprintf(fp,"init_flags(Flag_is_Copy"); - node_flags_set = true; - } + fprintf(fp,"init_flags(Flag_is_Copy"); + node_flags_set = true; } // Is an instruction is a constant? If so, get its type @@ -1708,16 +1694,6 @@ void ArchDesc::declareClasses(FILE *fp) { } } - // flag: if this instruction is pc relative - if ( is_pc_relative ) { - if ( node_flags_set ) { - fprintf(fp," | Flag_is_pc_relative"); - } else { - fprintf(fp,"init_flags(Flag_is_pc_relative"); - node_flags_set = true; - } - } - // flag: if this instruction has short branch form if ( instr->has_short_branch_form() ) { if ( node_flags_set ) { @@ -1743,10 +1719,6 @@ void ArchDesc::declareClasses(FILE *fp) { fprintf(fp,"); "); } - if (instr->is_ideal_unlock() || instr->is_ideal_call_leaf()) { - fprintf(fp,"clear_flag(Flag_is_safepoint_node); "); - } - fprintf(fp,"}\n"); // size_of, used by base class's clone to obtain the correct size. diff --git a/src/share/vm/opto/block.cpp b/src/share/vm/opto/block.cpp index 5514b97f8..1f32ef305 100644 --- a/src/share/vm/opto/block.cpp +++ b/src/share/vm/opto/block.cpp @@ -165,7 +165,7 @@ int Block::is_Empty() const { int end_idx = _nodes.size()-1; // Check for ending goto - if ((end_idx > 0) && (_nodes[end_idx]->is_Goto())) { + if ((end_idx > 0) && (_nodes[end_idx]->is_MachGoto())) { success_result = empty_with_goto; end_idx--; } @@ -197,11 +197,11 @@ int Block::is_Empty() const { bool Block::has_uncommon_code() const { Node* en = end(); - if (en->is_Goto()) + if (en->is_MachGoto()) en = en->in(0); if (en->is_Catch()) en = en->in(0); - if (en->is_Proj() && en->in(0)->is_MachCall()) { + if (en->is_MachProj() && en->in(0)->is_MachCall()) { MachCallNode* call = en->in(0)->as_MachCall(); if (call->cnt() != COUNT_UNKNOWN && call->cnt() <= PROB_UNLIKELY_MAG(4)) { // This is true for slow-path stubs like new_{instance,array}, @@ -945,8 +945,8 @@ void PhaseCFG::verify( ) const { assert( bp, "last instruction must be a block proj" ); assert( bp == b->_nodes[j], "wrong number of successors for this block" ); if( bp->is_Catch() ) { - while( b->_nodes[--j]->Opcode() == Op_MachProj ) ; - assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" ); + while( b->_nodes[--j]->is_MachProj() ) ; + assert( b->_nodes[j]->is_MachCall(), "CatchProj must follow call" ); } else if( bp->is_Mach() && bp->as_Mach()->ideal_Opcode() == Op_If ) { assert( b->_num_succs == 2, "Conditional branch must have two targets"); diff --git a/src/share/vm/opto/callnode.hpp b/src/share/vm/opto/callnode.hpp index 774b4b8dd..ee72a6e3a 100644 --- a/src/share/vm/opto/callnode.hpp +++ b/src/share/vm/opto/callnode.hpp @@ -67,7 +67,6 @@ public: const TypeTuple *_domain; StartNode( Node *root, const TypeTuple *domain ) : MultiNode(2), _domain(domain) { init_class_id(Class_Start); - init_flags(Flag_is_block_start); init_req(0,this); init_req(1,root); } @@ -513,7 +512,6 @@ public: _cnt(COUNT_UNKNOWN) { init_class_id(Class_Call); - init_flags(Flag_is_Call); } const TypeFunc* tf() const { return _tf; } diff --git a/src/share/vm/opto/cfgnode.hpp b/src/share/vm/opto/cfgnode.hpp index 71bc2ab75..a51d78bb3 100644 --- a/src/share/vm/opto/cfgnode.hpp +++ b/src/share/vm/opto/cfgnode.hpp @@ -217,9 +217,7 @@ public: // GotoNodes perform direct branches. class GotoNode : public Node { public: - GotoNode( Node *control ) : Node(control) { - init_flags(Flag_is_Goto); - } + GotoNode( Node *control ) : Node(control) {} virtual int Opcode() const; virtual bool pinned() const { return true; } virtual bool is_CFG() const { return true; } diff --git a/src/share/vm/opto/coalesce.cpp b/src/share/vm/opto/coalesce.cpp index bc4d1fdcf..0811ea061 100644 --- a/src/share/vm/opto/coalesce.cpp +++ b/src/share/vm/opto/coalesce.cpp @@ -139,7 +139,7 @@ int PhaseChaitin::clone_projs( Block *b, uint idx, Node *con, Node *copy, uint & Block *bcon = _cfg._bbs[con->_idx]; uint cindex = bcon->find_node(con); Node *con_next = bcon->_nodes[cindex+1]; - if( con_next->in(0) != con || con_next->Opcode() != Op_MachProj ) + if( con_next->in(0) != con || !con_next->is_MachProj() ) return false; // No MachProj's follow // Copy kills after the cloned constant @@ -312,7 +312,7 @@ void PhaseAggressiveCoalesce::insert_copy_with_overlap( Block *b, Node *copy, ui // parallel renaming effort. if( n->_idx < _unique ) break; uint idx = n->is_Copy(); - assert( idx || n->is_Con() || n->Opcode() == Op_MachProj, "Only copies during parallel renaming" ); + assert( idx || n->is_Con() || n->is_MachProj(), "Only copies during parallel renaming" ); if( idx && _phc.Find(n->in(idx)) == dst_name ) break; i--; } @@ -329,7 +329,7 @@ void PhaseAggressiveCoalesce::insert_copy_with_overlap( Block *b, Node *copy, ui // Check for end of virtual copies; this is also the end of the // parallel renaming effort. if( n->_idx < _unique ) break; - assert( n->is_Copy() || n->is_Con() || n->Opcode() == Op_MachProj, "Only copies during parallel renaming" ); + assert( n->is_Copy() || n->is_Con() || n->is_MachProj(), "Only copies during parallel renaming" ); if( _phc.Find(n) == src_name ) { kill_src_idx = i; break; diff --git a/src/share/vm/opto/gcm.cpp b/src/share/vm/opto/gcm.cpp index f714d01f0..b504ea59f 100644 --- a/src/share/vm/opto/gcm.cpp +++ b/src/share/vm/opto/gcm.cpp @@ -1137,7 +1137,7 @@ void PhaseCFG::schedule_late(VectorSet &visited, Node_List &stack) { // No uses, just terminate if (self->outcnt() == 0) { - assert(self->Opcode() == Op_MachProj, "sanity"); + assert(self->is_MachProj(), "sanity"); continue; // Must be a dead machine projection } diff --git a/src/share/vm/opto/idealGraphPrinter.cpp b/src/share/vm/opto/idealGraphPrinter.cpp index 829673aa7..7803ac647 100644 --- a/src/share/vm/opto/idealGraphPrinter.cpp +++ b/src/share/vm/opto/idealGraphPrinter.cpp @@ -426,9 +426,6 @@ void IdealGraphPrinter::visit_node(Node *n, void *param) { if (flags & Node::Flag_is_Copy) { print_prop("is_copy", "true"); } - if (flags & Node::Flag_is_Call) { - print_prop("is_call", "true"); - } if (flags & Node::Flag_rematerialize) { print_prop("rematerialize", "true"); } @@ -447,24 +444,12 @@ void IdealGraphPrinter::visit_node(Node *n, void *param) { if (flags & Node::Flag_is_Branch) { print_prop("is_branch", "true"); } - if (flags & Node::Flag_is_block_start) { - print_prop("is_block_start", "true"); - } - if (flags & Node::Flag_is_Goto) { - print_prop("is_goto", "true"); - } if (flags & Node::Flag_is_dead_loop_safe) { print_prop("is_dead_loop_safe", "true"); } if (flags & Node::Flag_may_be_short_branch) { print_prop("may_be_short_branch", "true"); } - if (flags & Node::Flag_is_safepoint_node) { - print_prop("is_safepoint_node", "true"); - } - if (flags & Node::Flag_is_pc_relative) { - print_prop("is_pc_relative", "true"); - } if (C->matcher() != NULL) { if (C->matcher()->is_shared(node)) { diff --git a/src/share/vm/opto/lcm.cpp b/src/share/vm/opto/lcm.cpp index af75a8d42..425e10bad 100644 --- a/src/share/vm/opto/lcm.cpp +++ b/src/share/vm/opto/lcm.cpp @@ -325,7 +325,7 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe // that also need to be hoisted. for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { Node* n = val->fast_out(j); - if( n->Opcode() == Op_MachProj ) { + if( n->is_MachProj() ) { cfg->_bbs[n->_idx]->find_remove(n); this->add_inst(n); cfg->_bbs.map(n->_idx,this); @@ -347,7 +347,7 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe // Should be DU safe because no edge updates. for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { Node* n = best->fast_out(j); - if( n->Opcode() == Op_MachProj ) { + if( n->is_MachProj() ) { cfg->_bbs[n->_idx]->find_remove(n); add_inst(n); cfg->_bbs.map(n->_idx,this); @@ -539,7 +539,7 @@ void Block::needed_for_next_call(Node *this_call, VectorSet &next_call, Block_Ar Node* m = this_call->fast_out(i); if( bbs[m->_idx] == this && // Local-block user m != this_call && // Not self-start node - m->is_Call() ) + m->is_MachCall() ) call = m; break; } @@ -557,7 +557,7 @@ uint Block::sched_call( Matcher &matcher, Block_Array &bbs, uint node_cnt, Node_ // Collect all the defined registers. for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { Node* n = mcall->fast_out(i); - assert( n->Opcode()==Op_MachProj, "" ); + assert( n->is_MachProj(), "" ); --ready_cnt[n->_idx]; assert( !ready_cnt[n->_idx], "" ); // Schedule next to call @@ -975,8 +975,8 @@ void Block::call_catch_cleanup(Block_Array &bbs) { if( !_nodes[end]->is_Catch() ) return; // Start of region to clone uint beg = end; - while( _nodes[beg-1]->Opcode() != Op_MachProj || - !_nodes[beg-1]->in(0)->is_Call() ) { + while(!_nodes[beg-1]->is_MachProj() || + !_nodes[beg-1]->in(0)->is_MachCall() ) { beg--; assert(beg > 0,"Catch cleanup walking beyond block boundary"); } diff --git a/src/share/vm/opto/machnode.hpp b/src/share/vm/opto/machnode.hpp index b1544c367..cad89a0c6 100644 --- a/src/share/vm/opto/machnode.hpp +++ b/src/share/vm/opto/machnode.hpp @@ -275,9 +275,6 @@ public: // Apply peephole rule(s) to this instruction virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); - // Check for PC-Relative addressing - bool is_pc_relative() const { return (flags() & Flag_is_pc_relative) != 0; } - // Top-level ideal Opcode matched virtual int ideal_Opcode() const { return Op_Node; } @@ -525,7 +522,7 @@ public: const uint _vidx; // Index of memop being tested MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachIdealNode(), _vidx(vidx) { init_class_id(Class_MachNullCheck); - init_flags(Flag_is_Branch | Flag_is_pc_relative); + init_flags(Flag_is_Branch); add_req(ctrl); add_req(memop); } @@ -554,7 +551,9 @@ public: // occasional callbacks to the machine model for important info. class MachProjNode : public ProjNode { public: - MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {} + MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { + init_class_id(Class_MachProj); + } RegMask _rout; const uint _ideal_reg; enum projType { @@ -589,6 +588,15 @@ public: #endif }; +//------------------------------MachGotoNode----------------------------------- +// Machine-specific versions of GotoNodes +class MachGotoNode : public MachNode { +public: + MachGotoNode() : MachNode() { + init_class_id(Class_MachGoto); + } +}; + //------------------------------MachFastLockNode------------------------------------- // Machine-specific versions of FastLockNodes class MachFastLockNode : public MachNode { @@ -631,14 +639,12 @@ public: MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { init_class_id(Class_MachSafePoint); - init_flags(Flag_is_safepoint_node); } virtual JVMState* jvms() const { return _jvms; } void set_jvms(JVMState* s) { _jvms = s; } - bool is_safepoint_node() const { return (flags() & Flag_is_safepoint_node) != 0; } virtual const Type *bottom_type() const; virtual const RegMask &in_RegMask(uint) const; @@ -702,7 +708,6 @@ public: MachCallNode() : MachSafePointNode() { init_class_id(Class_MachCall); - init_flags(Flag_is_Call); } virtual const Type *bottom_type() const; diff --git a/src/share/vm/opto/mulnode.cpp b/src/share/vm/opto/mulnode.cpp index cf838c769..f08631928 100644 --- a/src/share/vm/opto/mulnode.cpp +++ b/src/share/vm/opto/mulnode.cpp @@ -98,7 +98,7 @@ Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) { const Type *t12 = phase->type( mul1->in(2) ); if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant? // Compute new constant; check for overflow - const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12); + const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12); if( tcon01->singleton() ) { // The Mul of the flattened expression set_req(1, mul1->in(1)); diff --git a/src/share/vm/opto/mulnode.hpp b/src/share/vm/opto/mulnode.hpp index a674940b5..11cc77145 100644 --- a/src/share/vm/opto/mulnode.hpp +++ b/src/share/vm/opto/mulnode.hpp @@ -41,9 +41,7 @@ class PhaseTransform; class MulNode : public Node { virtual uint hash() const; public: - MulNode( Node *in1, Node *in2 ): Node(0,in1,in2) { - init_class_id(Class_Mul); - } + MulNode( Node *in1, Node *in2 ): Node(0,in1,in2) {} // Handle algebraic identities here. If we have an identity, return the Node // we are equivalent to. We look for "add of zero" as an identity. diff --git a/src/share/vm/opto/node.hpp b/src/share/vm/opto/node.hpp index 37a658da7..4b53d9d80 100644 --- a/src/share/vm/opto/node.hpp +++ b/src/share/vm/opto/node.hpp @@ -67,6 +67,8 @@ class EncodePNode; class FastLockNode; class FastUnlockNode; class IfNode; +class IfFalseNode; +class IfTrueNode; class InitializeNode; class JVMState; class JumpNode; @@ -83,9 +85,11 @@ class MachCallRuntimeNode; class MachCallStaticJavaNode; class MachConstantBaseNode; class MachConstantNode; +class MachGotoNode; class MachIfNode; class MachNode; class MachNullCheckNode; +class MachProjNode; class MachReturnNode; class MachSafePointNode; class MachSpillCopyNode; @@ -94,7 +98,6 @@ class Matcher; class MemBarNode; class MemNode; class MergeMemNode; -class MulNode; class MultiNode; class MultiBranchNode; class NeverBranchNode; @@ -127,9 +130,10 @@ class SubNode; class Type; class TypeNode; class UnlockNode; +class VectorNode; +class VectorLoadNode; +class VectorStoreNode; class VectorSet; -class IfTrueNode; -class IfFalseNode; typedef void (*NFunc)(Node&,void*); extern "C" { typedef int (*C_sort_func_t)(const void *, const void *); @@ -574,44 +578,48 @@ public: DEFINE_CLASS_ID(MachTemp, Mach, 4) DEFINE_CLASS_ID(MachConstantBase, Mach, 5) DEFINE_CLASS_ID(MachConstant, Mach, 6) + DEFINE_CLASS_ID(MachGoto, Mach, 7) + + DEFINE_CLASS_ID(Type, Node, 2) + DEFINE_CLASS_ID(Phi, Type, 0) + DEFINE_CLASS_ID(ConstraintCast, Type, 1) + DEFINE_CLASS_ID(CheckCastPP, Type, 2) + DEFINE_CLASS_ID(CMove, Type, 3) + DEFINE_CLASS_ID(SafePointScalarObject, Type, 4) + DEFINE_CLASS_ID(DecodeN, Type, 5) + DEFINE_CLASS_ID(EncodeP, Type, 6) - DEFINE_CLASS_ID(Proj, Node, 2) + DEFINE_CLASS_ID(Proj, Node, 3) DEFINE_CLASS_ID(CatchProj, Proj, 0) DEFINE_CLASS_ID(JumpProj, Proj, 1) DEFINE_CLASS_ID(IfTrue, Proj, 2) DEFINE_CLASS_ID(IfFalse, Proj, 3) DEFINE_CLASS_ID(Parm, Proj, 4) + DEFINE_CLASS_ID(MachProj, Proj, 5) - DEFINE_CLASS_ID(Region, Node, 3) + DEFINE_CLASS_ID(Mem, Node, 4) + DEFINE_CLASS_ID(Load, Mem, 0) + DEFINE_CLASS_ID(VectorLoad, Load, 0) + DEFINE_CLASS_ID(Store, Mem, 1) + DEFINE_CLASS_ID(VectorStore, Store, 0) + DEFINE_CLASS_ID(LoadStore, Mem, 2) + + DEFINE_CLASS_ID(Region, Node, 5) DEFINE_CLASS_ID(Loop, Region, 0) DEFINE_CLASS_ID(Root, Loop, 0) DEFINE_CLASS_ID(CountedLoop, Loop, 1) - DEFINE_CLASS_ID(Sub, Node, 4) + DEFINE_CLASS_ID(Sub, Node, 6) DEFINE_CLASS_ID(Cmp, Sub, 0) DEFINE_CLASS_ID(FastLock, Cmp, 0) DEFINE_CLASS_ID(FastUnlock, Cmp, 1) - DEFINE_CLASS_ID(Type, Node, 5) - DEFINE_CLASS_ID(Phi, Type, 0) - DEFINE_CLASS_ID(ConstraintCast, Type, 1) - DEFINE_CLASS_ID(CheckCastPP, Type, 2) - DEFINE_CLASS_ID(CMove, Type, 3) - DEFINE_CLASS_ID(SafePointScalarObject, Type, 4) - DEFINE_CLASS_ID(DecodeN, Type, 5) - DEFINE_CLASS_ID(EncodeP, Type, 6) - - DEFINE_CLASS_ID(Mem, Node, 6) - DEFINE_CLASS_ID(Load, Mem, 0) - DEFINE_CLASS_ID(Store, Mem, 1) - DEFINE_CLASS_ID(LoadStore, Mem, 2) - DEFINE_CLASS_ID(MergeMem, Node, 7) DEFINE_CLASS_ID(Bool, Node, 8) DEFINE_CLASS_ID(AddP, Node, 9) DEFINE_CLASS_ID(BoxLock, Node, 10) DEFINE_CLASS_ID(Add, Node, 11) - DEFINE_CLASS_ID(Mul, Node, 12) + DEFINE_CLASS_ID(Vector, Node, 12) DEFINE_CLASS_ID(ClearArray, Node, 13) _max_classes = ClassMask_ClearArray @@ -621,21 +629,15 @@ public: // Flags are sorted by usage frequency. enum NodeFlags { Flag_is_Copy = 0x01, // should be first bit to avoid shift - Flag_is_Call = Flag_is_Copy << 1, - Flag_rematerialize = Flag_is_Call << 1, + Flag_rematerialize = Flag_is_Copy << 1, Flag_needs_anti_dependence_check = Flag_rematerialize << 1, Flag_is_macro = Flag_needs_anti_dependence_check << 1, Flag_is_Con = Flag_is_macro << 1, Flag_is_cisc_alternate = Flag_is_Con << 1, Flag_is_Branch = Flag_is_cisc_alternate << 1, - Flag_is_block_start = Flag_is_Branch << 1, - Flag_is_Goto = Flag_is_block_start << 1, - Flag_is_dead_loop_safe = Flag_is_Goto << 1, + Flag_is_dead_loop_safe = Flag_is_Branch << 1, Flag_may_be_short_branch = Flag_is_dead_loop_safe << 1, - Flag_is_safepoint_node = Flag_may_be_short_branch << 1, - Flag_is_pc_relative = Flag_is_safepoint_node << 1, - Flag_is_Vector = Flag_is_pc_relative << 1, - _max_flags = (Flag_is_Vector << 1) - 1 // allow flags combination + _max_flags = (Flag_may_be_short_branch << 1) - 1 // allow flags combination }; private: @@ -669,21 +671,6 @@ public: virtual uint size_of() const; // Other interesting Node properties - - // Special case: is_Call() returns true for both CallNode and MachCallNode. - bool is_Call() const { - return (_flags & Flag_is_Call) != 0; - } - - CallNode* isa_Call() const { - return is_Call() ? as_Call() : NULL; - } - - CallNode *as_Call() const { // Only for CallNode (not for MachCallNode) - assert((_class_id & ClassMask_Call) == Class_Call, "invalid node class"); - return (CallNode*)this; - } - #define DEFINE_CLASS_QUERY(type) \ bool is_##type() const { \ return ((_class_id & ClassMask_##type) == Class_##type); \ @@ -703,6 +690,7 @@ public: DEFINE_CLASS_QUERY(AllocateArray) DEFINE_CLASS_QUERY(Bool) DEFINE_CLASS_QUERY(BoxLock) + DEFINE_CLASS_QUERY(Call) DEFINE_CLASS_QUERY(CallDynamicJava) DEFINE_CLASS_QUERY(CallJava) DEFINE_CLASS_QUERY(CallLeaf) @@ -740,8 +728,10 @@ public: DEFINE_CLASS_QUERY(MachCallStaticJava) DEFINE_CLASS_QUERY(MachConstantBase) DEFINE_CLASS_QUERY(MachConstant) + DEFINE_CLASS_QUERY(MachGoto) DEFINE_CLASS_QUERY(MachIf) DEFINE_CLASS_QUERY(MachNullCheck) + DEFINE_CLASS_QUERY(MachProj) DEFINE_CLASS_QUERY(MachReturn) DEFINE_CLASS_QUERY(MachSafePoint) DEFINE_CLASS_QUERY(MachSpillCopy) @@ -749,7 +739,6 @@ public: DEFINE_CLASS_QUERY(Mem) DEFINE_CLASS_QUERY(MemBar) DEFINE_CLASS_QUERY(MergeMem) - DEFINE_CLASS_QUERY(Mul) DEFINE_CLASS_QUERY(Multi) DEFINE_CLASS_QUERY(MultiBranch) DEFINE_CLASS_QUERY(Parm) @@ -764,6 +753,9 @@ public: DEFINE_CLASS_QUERY(Store) DEFINE_CLASS_QUERY(Sub) DEFINE_CLASS_QUERY(Type) + DEFINE_CLASS_QUERY(Vector) + DEFINE_CLASS_QUERY(VectorLoad) + DEFINE_CLASS_QUERY(VectorStore) DEFINE_CLASS_QUERY(Unlock) #undef DEFINE_CLASS_QUERY @@ -774,7 +766,6 @@ public: } bool is_Con () const { return (_flags & Flag_is_Con) != 0; } - bool is_Goto() const { return (_flags & Flag_is_Goto) != 0; } // The data node which is safe to leave in dead loop during IGVN optimization. bool is_dead_loop_safe() const { return is_Phi() || (is_Proj() && in(0) == NULL) || @@ -795,7 +786,7 @@ public: // skip some other important test.) virtual bool depends_only_on_test() const { assert(!is_CFG(), ""); return true; }; - // defined for MachNodes that match 'If' | 'Goto' | 'CountedLoopEnd' + // defined for MachNodes that match 'If' | 'Goto' | 'CountedLoopEnd' | 'Jump' bool is_Branch() const { return (_flags & Flag_is_Branch) != 0; } // When building basic blocks, I need to have a notion of block beginning @@ -806,7 +797,7 @@ public: if ( is_Region() ) return this == (const Node*)in(0); else - return (_flags & Flag_is_block_start) != 0; + return is_Start(); } // The Ideal control projection Nodes are IfTrue/IfFalse, JumpProjNode, Root, @@ -816,9 +807,6 @@ public: // The node is a "macro" node which needs to be expanded before matching bool is_macro() const { return (_flags & Flag_is_macro) != 0; } - // Value is a vector of primitive values - bool is_Vector() const { return (_flags & Flag_is_Vector) != 0; } - //----------------- Optimization // Get the worst-case Type output for this Node. diff --git a/src/share/vm/opto/output.cpp b/src/share/vm/opto/output.cpp index 0cd49aa0c..1ea003eb4 100644 --- a/src/share/vm/opto/output.cpp +++ b/src/share/vm/opto/output.cpp @@ -395,7 +395,7 @@ void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, i } min_offset_from_last_call += inst_size; // Remember end of call offset - if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) { + if (nj->is_MachCall() && !nj->is_MachCallLeaf()) { min_offset_from_last_call = 0; } } @@ -447,7 +447,7 @@ void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, i // This requires the TRUE branch target be in succs[0] uint bnum = b->non_connector_successor(0)->_pre_order; uintptr_t target = blk_starts[bnum]; - if( mach->is_pc_relative() ) { + if( mach->is_Branch() ) { int offset = target-(blk_starts[i] + jmp_end[i]); if (_matcher->is_short_branch_offset(mach->rule(), offset)) { // We've got a winner. Replace this branch. @@ -508,7 +508,7 @@ void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, i adr += nj->size(_regalloc); // Remember end of call offset - if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) { + if (nj->is_MachCall() && !nj->is_MachCallLeaf()) { last_call_adr = adr; } } @@ -1295,7 +1295,7 @@ void Compile::Fill_buffer() { // Save the return address call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset(); - if (!mcall->is_safepoint_node()) { + if (mcall->is_MachCallLeaf()) { is_mcall = false; is_sfn = false; } @@ -1565,8 +1565,8 @@ void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_start uint call_return = call_returns[b->_pre_order]; #ifdef ASSERT assert( call_return > 0, "no call seen for this basic block" ); - while( b->_nodes[--j]->Opcode() == Op_MachProj ) ; - assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" ); + while( b->_nodes[--j]->is_MachProj() ) ; + assert( b->_nodes[j]->is_MachCall(), "CatchProj must follow call" ); #endif // last instruction is a CatchNode, find it's CatchProjNodes int nof_succs = b->_num_succs; @@ -2350,8 +2350,8 @@ void Scheduling::DoScheduling() { // Exclude unreachable path case when Halt node is in a separate block. (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) { // There must be a prior call. Skip it. - while( !bb->_nodes[--_bb_end]->is_Call() ) { - assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" ); + while( !bb->_nodes[--_bb_end]->is_MachCall() ) { + assert( bb->_nodes[_bb_end]->is_MachProj(), "skipping projections after expected call" ); } } else if( last->is_MachNullCheck() ) { // Backup so the last null-checked memory instruction is @@ -2663,7 +2663,7 @@ void Scheduling::ComputeRegisterAntidependencies(Block *b) { for( uint i = _bb_end-1; i >= _bb_start; i-- ) { Node *n = b->_nodes[i]; int is_def = n->outcnt(); // def if some uses prior to adding precedence edges - if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) { + if( n->is_MachProj() && n->ideal_reg() == MachProjNode::fat_proj ) { // Fat-proj kills a slew of registers // This can add edges to 'n' and obscure whether or not it was a def, // hence the is_def flag. @@ -2685,7 +2685,7 @@ void Scheduling::ComputeRegisterAntidependencies(Block *b) { for( uint j=0; j<n->req(); j++ ) { Node *def = n->in(j); if( def ) { - assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" ); + assert( !def->is_MachProj() || def->ideal_reg() != MachProjNode::fat_proj, "" ); anti_do_use( b, n, _regalloc->get_reg_first(def) ); anti_do_use( b, n, _regalloc->get_reg_second(def) ); } diff --git a/src/share/vm/opto/reg_split.cpp b/src/share/vm/opto/reg_split.cpp index 537961fd5..63a11fe8f 100644 --- a/src/share/vm/opto/reg_split.cpp +++ b/src/share/vm/opto/reg_split.cpp @@ -984,7 +984,7 @@ uint PhaseChaitin::Split( uint maxlrg ) { continue; } - if (UseFPUForSpilling && n->is_Call() && !uup && !dup ) { + if (UseFPUForSpilling && n->is_MachCall() && !uup && !dup ) { // The use at the call can force the def down so insert // a split before the use to allow the def more freedom. maxlrg = split_USE(def,b,n,inpidx,maxlrg,dup,false, splits,slidx); diff --git a/src/share/vm/opto/superword.cpp b/src/share/vm/opto/superword.cpp index 6e1be24dd..cf0f32a08 100644 --- a/src/share/vm/opto/superword.cpp +++ b/src/share/vm/opto/superword.cpp @@ -1167,7 +1167,7 @@ void SuperWord::output() { } else if (n->is_Store()) { // Promote value to be stored to vector - VectorNode* val = vector_opd(p, MemNode::ValueIn); + Node* val = vector_opd(p, MemNode::ValueIn); int opc = n->Opcode(); Node* ctl = n->in(MemNode::Control); @@ -1199,7 +1199,7 @@ void SuperWord::output() { //------------------------------vector_opd--------------------------- // Create a vector operand for the nodes in pack p for operand: in(opd_idx) -VectorNode* SuperWord::vector_opd(Node_List* p, int opd_idx) { +Node* SuperWord::vector_opd(Node_List* p, int opd_idx) { Node* p0 = p->at(0); uint vlen = p->size(); Node* opd = p0->in(opd_idx); @@ -1215,9 +1215,10 @@ VectorNode* SuperWord::vector_opd(Node_List* p, int opd_idx) { } if (same_opd) { - if (opd->is_Vector()) { - return (VectorNode*)opd; // input is matching vector + if (opd->is_Vector() || opd->is_VectorLoad()) { + return opd; // input is matching vector } + assert(!opd->is_VectorStore(), "such vector is not expected here"); // Convert scalar input to vector. Use p0's type because it's container // maybe smaller than the operand's container. const Type* opd_t = velt_type(!in_bb(opd) ? p0 : opd); diff --git a/src/share/vm/opto/superword.hpp b/src/share/vm/opto/superword.hpp index 50ab3d43e..509376712 100644 --- a/src/share/vm/opto/superword.hpp +++ b/src/share/vm/opto/superword.hpp @@ -360,7 +360,7 @@ class SuperWord : public ResourceObj { // Convert packs into vector node operations void output(); // Create a vector operand for the nodes in pack p for operand: in(opd_idx) - VectorNode* vector_opd(Node_List* p, int opd_idx); + Node* vector_opd(Node_List* p, int opd_idx); // Can code be generated for pack p? bool implemented(Node_List* p); // For pack p, are all operands and all uses (with in the block) vector? diff --git a/src/share/vm/opto/vectornode.cpp b/src/share/vm/opto/vectornode.cpp index 4d72b73a0..885a1c898 100644 --- a/src/share/vm/opto/vectornode.cpp +++ b/src/share/vm/opto/vectornode.cpp @@ -426,7 +426,7 @@ VectorLoadNode* VectorLoadNode::make(Compile* C, int opc, Node* ctl, Node* mem, // Return the vector version of a scalar store node. VectorStoreNode* VectorStoreNode::make(Compile* C, int opc, Node* ctl, Node* mem, - Node* adr, const TypePtr* atyp, VectorNode* val, + Node* adr, const TypePtr* atyp, Node* val, uint vlen) { int vopc = opcode(opc, vlen); diff --git a/src/share/vm/opto/vectornode.hpp b/src/share/vm/opto/vectornode.hpp index 4d28703c8..7d1905c7f 100644 --- a/src/share/vm/opto/vectornode.hpp +++ b/src/share/vm/opto/vectornode.hpp @@ -47,10 +47,10 @@ class VectorNode : public Node { friend class VectorStoreNode; // ditto. VectorNode(Node* n1, uint vlen) : Node(NULL, n1), _length(vlen) { - init_flags(Flag_is_Vector); + init_class_id(Class_Vector); } VectorNode(Node* n1, Node* n2, uint vlen) : Node(NULL, n1, n2), _length(vlen) { - init_flags(Flag_is_Vector); + init_class_id(Class_Vector); } virtual int Opcode() const; @@ -389,7 +389,7 @@ class VectorLoadNode : public LoadNode { public: VectorLoadNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const Type *rt) : LoadNode(c,mem,adr,at,rt) { - init_flags(Flag_is_Vector); + init_class_id(Class_VectorLoad); } virtual int Opcode() const; @@ -617,7 +617,7 @@ class VectorStoreNode : public StoreNode { public: VectorStoreNode(Node* c, Node* mem, Node* adr, const TypePtr* at, Node* val) : StoreNode(c,mem,adr,at,val) { - init_flags(Flag_is_Vector); + init_class_id(Class_VectorStore); } virtual int Opcode() const; @@ -635,7 +635,7 @@ class VectorStoreNode : public StoreNode { static int opcode(int sopc, uint vlen); static VectorStoreNode* make(Compile* C, int opc, Node* ctl, Node* mem, - Node* adr, const TypePtr* atyp, VectorNode* val, + Node* adr, const TypePtr* atyp, Node* val, uint vlen); }; |