diff options
author | jrose <none@none> | 2010-06-02 22:45:42 -0700 |
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committer | jrose <none@none> | 2010-06-02 22:45:42 -0700 |
commit | f5c11173784f3afbc5a741bfa24860f68e2326b0 (patch) | |
tree | 8e32b99f1f669fe44fc4f518799c45b1b067e57c /src/share/vm/opto/matcher.hpp | |
parent | db3885202d9095c5a296d45d3758e40bad411679 (diff) | |
parent | 90aebc75b907b0ddfeb3ef2d0576a47f3afc7656 (diff) |
Merge
Diffstat (limited to 'src/share/vm/opto/matcher.hpp')
-rw-r--r-- | src/share/vm/opto/matcher.hpp | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/share/vm/opto/matcher.hpp b/src/share/vm/opto/matcher.hpp index e4bcf567d..0badb1366 100644 --- a/src/share/vm/opto/matcher.hpp +++ b/src/share/vm/opto/matcher.hpp @@ -352,6 +352,38 @@ public: // registers? True for Intel but false for most RISCs static const bool clone_shift_expressions; + static bool narrow_oop_use_complex_address(); + + // Generate implicit null check for narrow oops if it can fold + // into address expression (x64). + // + // [R12 + narrow_oop_reg<<3 + offset] // fold into address expression + // NullCheck narrow_oop_reg + // + // When narrow oops can't fold into address expression (Sparc) and + // base is not null use decode_not_null and normal implicit null check. + // Note, decode_not_null node can be used here since it is referenced + // only on non null path but it requires special handling, see + // collect_null_checks(): + // + // decode_not_null narrow_oop_reg, oop_reg // 'shift' and 'add base' + // [oop_reg + offset] + // NullCheck oop_reg + // + // With Zero base and when narrow oops can not fold into address + // expression use normal implicit null check since only shift + // is needed to decode narrow oop. + // + // decode narrow_oop_reg, oop_reg // only 'shift' + // [oop_reg + offset] + // NullCheck oop_reg + // + inline static bool gen_narrow_oop_implicit_null_checks() { + return Universe::narrow_oop_use_implicit_null_checks() && + (narrow_oop_use_complex_address() || + Universe::narrow_oop_base() != NULL); + } + // Is it better to copy float constants, or load them directly from memory? // Intel can load a float constant from a direct address, requiring no // extra registers. Most RISCs will have to materialize an address into a |