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authorrbackman <none@none>2012-10-09 07:41:27 +0200
committerrbackman <none@none>2012-10-09 07:41:27 +0200
commit4946c51f2025d8f990b8b7c6840a9c2a4d186213 (patch)
tree778de6c93328a2fd5c1ea68a5e61dd3afe49a888 /src/cpu
parent60358ae2bcd95c00730bde44f23206c48dbe5b70 (diff)
parent17bae4fdecb52e775b85d881c78a6baac7c9f542 (diff)
Merge
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp4
-rw-r--r--src/cpu/sparc/vm/stubGenerator_sparc.cpp8
-rw-r--r--src/cpu/sparc/vm/templateTable_sparc.cpp2
-rw-r--r--src/cpu/x86/vm/assembler_x86.cpp34
-rw-r--r--src/cpu/x86/vm/c1_LIRAssembler_x86.cpp8
-rw-r--r--src/cpu/x86/vm/stubGenerator_x86_32.cpp6
-rw-r--r--src/cpu/x86/vm/stubGenerator_x86_64.cpp8
-rw-r--r--src/cpu/x86/vm/templateTable_x86_32.cpp2
-rw-r--r--src/cpu/x86/vm/templateTable_x86_64.cpp2
-rw-r--r--src/cpu/x86/vm/x86_32.ad8
10 files changed, 31 insertions, 51 deletions
diff --git a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp
index 61ec673c5..3f26a2b57 100644
--- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp
+++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp
@@ -2290,7 +2290,7 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
__ mov(length, len);
__ load_klass(dst, tmp);
- int ek_offset = in_bytes(objArrayKlass::element_klass_offset());
+ int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
__ ld_ptr(tmp, ek_offset, super_k);
int sco_offset = in_bytes(Klass::super_check_offset_offset());
@@ -2781,7 +2781,7 @@ void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
__ load_klass(value, klass_RInfo);
// get instance klass
- __ ld_ptr(Address(k_RInfo, objArrayKlass::element_klass_offset()), k_RInfo);
+ __ ld_ptr(Address(k_RInfo, ObjArrayKlass::element_klass_offset()), k_RInfo);
// perform the fast part of the checking logic
__ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, O7, success_target, failure_target, NULL);
diff --git a/src/cpu/sparc/vm/stubGenerator_sparc.cpp b/src/cpu/sparc/vm/stubGenerator_sparc.cpp
index d0887f6cf..8faea5119 100644
--- a/src/cpu/sparc/vm/stubGenerator_sparc.cpp
+++ b/src/cpu/sparc/vm/stubGenerator_sparc.cpp
@@ -3091,7 +3091,7 @@ class StubGenerator: public StubCodeGenerator {
arraycopy_range_checks(src, src_pos, dst, dst_pos, length,
O5_temp, G4_dst_klass, L_failed);
- // typeArrayKlass
+ // TypeArrayKlass
//
// src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
// dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
@@ -3142,7 +3142,7 @@ class StubGenerator: public StubCodeGenerator {
__ br(Assembler::always, false, Assembler::pt, entry_jlong_arraycopy);
__ delayed()->signx(length, count); // length
- // objArrayKlass
+ // ObjArrayKlass
__ BIND(L_objArray);
// live at this point: G3_src_klass, G4_dst_klass, src[_pos], dst[_pos], length
@@ -3198,8 +3198,8 @@ class StubGenerator: public StubCodeGenerator {
generate_type_check(G3_src_klass, sco_temp, G4_dst_klass,
O5_temp, L_plain_copy);
- // Fetch destination element klass from the objArrayKlass header.
- int ek_offset = in_bytes(objArrayKlass::element_klass_offset());
+ // Fetch destination element klass from the ObjArrayKlass header.
+ int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
// the checkcast_copy loop needs two extra arguments:
__ ld_ptr(G4_dst_klass, ek_offset, O4); // dest elem klass
diff --git a/src/cpu/sparc/vm/templateTable_sparc.cpp b/src/cpu/sparc/vm/templateTable_sparc.cpp
index 89666cb98..5b1887dbb 100644
--- a/src/cpu/sparc/vm/templateTable_sparc.cpp
+++ b/src/cpu/sparc/vm/templateTable_sparc.cpp
@@ -867,7 +867,7 @@ void TemplateTable::aastore() {
// do fast instanceof cache test
- __ ld_ptr(O4, in_bytes(objArrayKlass::element_klass_offset()), O4);
+ __ ld_ptr(O4, in_bytes(ObjArrayKlass::element_klass_offset()), O4);
assert(Otos_i == O0, "just checking");
diff --git a/src/cpu/x86/vm/assembler_x86.cpp b/src/cpu/x86/vm/assembler_x86.cpp
index 0f6b99dd5..734d739a6 100644
--- a/src/cpu/x86/vm/assembler_x86.cpp
+++ b/src/cpu/x86/vm/assembler_x86.cpp
@@ -1170,26 +1170,11 @@ void Assembler::cmpw(Address dst, int imm16) {
// and stores reg into adr if so; otherwise, the value at adr is loaded into rax,.
// The ZF is set if the compared values were equal, and cleared otherwise.
void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg
- if (Atomics & 2) {
- // caveat: no instructionmark, so this isn't relocatable.
- // Emit a synthetic, non-atomic, CAS equivalent.
- // Beware. The synthetic form sets all ICCs, not just ZF.
- // cmpxchg r,[m] is equivalent to rax, = CAS (m, rax, r)
- cmpl(rax, adr);
- movl(rax, adr);
- if (reg != rax) {
- Label L ;
- jcc(Assembler::notEqual, L);
- movl(adr, reg);
- bind(L);
- }
- } else {
- InstructionMark im(this);
- prefix(adr, reg);
- emit_byte(0x0F);
- emit_byte(0xB1);
- emit_operand(reg, adr);
- }
+ InstructionMark im(this);
+ prefix(adr, reg);
+ emit_byte(0x0F);
+ emit_byte(0xB1);
+ emit_operand(reg, adr);
}
void Assembler::comisd(XMMRegister dst, Address src) {
@@ -1513,12 +1498,7 @@ void Assembler::leal(Register dst, Address src) {
}
void Assembler::lock() {
- if (Atomics & 1) {
- // Emit either nothing, a NOP, or a NOP: prefix
- emit_byte(0x90) ;
- } else {
- emit_byte(0xF0);
- }
+ emit_byte(0xF0);
}
void Assembler::lzcntl(Register dst, Register src) {
@@ -10616,7 +10596,7 @@ void MacroAssembler::string_indexof(Register str1, Register str2,
// Array header size is 12 bytes in 32-bit VM
// + 6 bytes for 3 chars == 18 bytes,
// enough space to load vec and shift.
- assert(HeapWordSize*typeArrayKlass::header_size() >= 12,"sanity");
+ assert(HeapWordSize*TypeArrayKlass::header_size() >= 12,"sanity");
movdqu(vec, Address(str2, (int_cnt2*2)-16));
psrldq(vec, 16-(int_cnt2*2));
}
diff --git a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
index 60eab0920..a0c4b6370 100644
--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
+++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
@@ -1881,7 +1881,7 @@ void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
__ load_klass(klass_RInfo, value);
// get instance klass (it's already uncompressed)
- __ movptr(k_RInfo, Address(k_RInfo, objArrayKlass::element_klass_offset()));
+ __ movptr(k_RInfo, Address(k_RInfo, ObjArrayKlass::element_klass_offset()));
// perform the fast part of the checking logic
__ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, success_target, failure_target, NULL);
// call out-of-line instance of __ check_klass_subtype_slow_path(...):
@@ -3349,7 +3349,7 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
#ifndef _LP64
__ movptr(tmp, dst_klass_addr);
- __ movptr(tmp, Address(tmp, objArrayKlass::element_klass_offset()));
+ __ movptr(tmp, Address(tmp, ObjArrayKlass::element_klass_offset()));
__ push(tmp);
__ movl(tmp, Address(tmp, Klass::super_check_offset_offset()));
__ push(tmp);
@@ -3375,14 +3375,14 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
// Allocate abi space for args but be sure to keep stack aligned
__ subptr(rsp, 6*wordSize);
__ load_klass(c_rarg3, dst);
- __ movptr(c_rarg3, Address(c_rarg3, objArrayKlass::element_klass_offset()));
+ __ movptr(c_rarg3, Address(c_rarg3, ObjArrayKlass::element_klass_offset()));
store_parameter(c_rarg3, 4);
__ movl(c_rarg3, Address(c_rarg3, Klass::super_check_offset_offset()));
__ call(RuntimeAddress(copyfunc_addr));
__ addptr(rsp, 6*wordSize);
#else
__ load_klass(c_rarg4, dst);
- __ movptr(c_rarg4, Address(c_rarg4, objArrayKlass::element_klass_offset()));
+ __ movptr(c_rarg4, Address(c_rarg4, ObjArrayKlass::element_klass_offset()));
__ movl(c_rarg3, Address(c_rarg4, Klass::super_check_offset_offset()));
__ call(RuntimeAddress(copyfunc_addr));
#endif
diff --git a/src/cpu/x86/vm/stubGenerator_x86_32.cpp b/src/cpu/x86/vm/stubGenerator_x86_32.cpp
index 8a9de37e1..f149fde83 100644
--- a/src/cpu/x86/vm/stubGenerator_x86_32.cpp
+++ b/src/cpu/x86/vm/stubGenerator_x86_32.cpp
@@ -1801,7 +1801,7 @@ class StubGenerator: public StubCodeGenerator {
assert_different_registers(src, src_pos, dst, dst_pos, rcx_lh);
arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
- // typeArrayKlass
+ // TypeArrayKlass
//
// src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
// dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
@@ -1864,7 +1864,7 @@ class StubGenerator: public StubCodeGenerator {
__ leave(); // required for proper stackwalking of RuntimeStub frame
__ ret(0);
- // objArrayKlass
+ // ObjArrayKlass
__ BIND(L_objArray);
// live at this point: rcx_src_klass, src[_pos], dst[_pos]
@@ -1894,7 +1894,7 @@ class StubGenerator: public StubCodeGenerator {
// live at this point: rcx_src_klass, dst[_pos], src[_pos]
{
// Handy offsets:
- int ek_offset = in_bytes(objArrayKlass::element_klass_offset());
+ int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
int sco_offset = in_bytes(Klass::super_check_offset_offset());
Register rsi_dst_klass = rsi;
diff --git a/src/cpu/x86/vm/stubGenerator_x86_64.cpp b/src/cpu/x86/vm/stubGenerator_x86_64.cpp
index de60df86f..8ae595a56 100644
--- a/src/cpu/x86/vm/stubGenerator_x86_64.cpp
+++ b/src/cpu/x86/vm/stubGenerator_x86_64.cpp
@@ -2604,7 +2604,7 @@ class StubGenerator: public StubCodeGenerator {
arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
r10, L_failed);
- // typeArrayKlass
+ // TypeArrayKlass
//
// src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
// dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
@@ -2670,7 +2670,7 @@ class StubGenerator: public StubCodeGenerator {
__ movl2ptr(count, r11_length); // length
__ jump(RuntimeAddress(long_copy_entry));
- // objArrayKlass
+ // ObjArrayKlass
__ BIND(L_objArray);
// live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
@@ -2723,8 +2723,8 @@ class StubGenerator: public StubCodeGenerator {
assert_clean_int(sco_temp, rax);
generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
- // Fetch destination element klass from the objArrayKlass header.
- int ek_offset = in_bytes(objArrayKlass::element_klass_offset());
+ // Fetch destination element klass from the ObjArrayKlass header.
+ int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
__ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
__ movl( sco_temp, Address(r11_dst_klass, sco_offset));
assert_clean_int(sco_temp, rax);
diff --git a/src/cpu/x86/vm/templateTable_x86_32.cpp b/src/cpu/x86/vm/templateTable_x86_32.cpp
index 258622a4a..24d138e49 100644
--- a/src/cpu/x86/vm/templateTable_x86_32.cpp
+++ b/src/cpu/x86/vm/templateTable_x86_32.cpp
@@ -949,7 +949,7 @@ void TemplateTable::aastore() {
__ load_klass(rbx, rax);
// Move superklass into EAX
__ load_klass(rax, rdx);
- __ movptr(rax, Address(rax, objArrayKlass::element_klass_offset()));
+ __ movptr(rax, Address(rax, ObjArrayKlass::element_klass_offset()));
// Compress array+index*wordSize+12 into a single register. Frees ECX.
__ lea(rdx, element_address);
diff --git a/src/cpu/x86/vm/templateTable_x86_64.cpp b/src/cpu/x86/vm/templateTable_x86_64.cpp
index e823adeaf..bb9b86f24 100644
--- a/src/cpu/x86/vm/templateTable_x86_64.cpp
+++ b/src/cpu/x86/vm/templateTable_x86_64.cpp
@@ -970,7 +970,7 @@ void TemplateTable::aastore() {
// Move superklass into rax
__ load_klass(rax, rdx);
__ movptr(rax, Address(rax,
- objArrayKlass::element_klass_offset()));
+ ObjArrayKlass::element_klass_offset()));
// Compress array + index*oopSize + 12 into a single register. Frees rcx.
__ lea(rdx, element_address);
diff --git a/src/cpu/x86/vm/x86_32.ad b/src/cpu/x86/vm/x86_32.ad
index f5019cb59..e3afe6b3a 100644
--- a/src/cpu/x86/vm/x86_32.ad
+++ b/src/cpu/x86/vm/x86_32.ad
@@ -12145,8 +12145,8 @@ instruct partialSubtypeCheck( eDIRegP result, eSIRegP sub, eAXRegP super, eCXReg
ins_cost(1100); // slightly larger than the next version
format %{ "MOV EDI,[$sub+Klass::secondary_supers]\n\t"
- "MOV ECX,[EDI+arrayKlass::length]\t# length to scan\n\t"
- "ADD EDI,arrayKlass::base_offset\t# Skip to start of data; set NZ in case count is zero\n\t"
+ "MOV ECX,[EDI+ArrayKlass::length]\t# length to scan\n\t"
+ "ADD EDI,ArrayKlass::base_offset\t# Skip to start of data; set NZ in case count is zero\n\t"
"REPNE SCASD\t# Scan *EDI++ for a match with EAX while CX-- != 0\n\t"
"JNE,s miss\t\t# Missed: EDI not-zero\n\t"
"MOV [$sub+Klass::secondary_super_cache],$super\t# Hit: update cache\n\t"
@@ -12164,8 +12164,8 @@ instruct partialSubtypeCheck_vs_Zero( eFlagsReg cr, eSIRegP sub, eAXRegP super,
ins_cost(1000);
format %{ "MOV EDI,[$sub+Klass::secondary_supers]\n\t"
- "MOV ECX,[EDI+arrayKlass::length]\t# length to scan\n\t"
- "ADD EDI,arrayKlass::base_offset\t# Skip to start of data; set NZ in case count is zero\n\t"
+ "MOV ECX,[EDI+ArrayKlass::length]\t# length to scan\n\t"
+ "ADD EDI,ArrayKlass::base_offset\t# Skip to start of data; set NZ in case count is zero\n\t"
"REPNE SCASD\t# Scan *EDI++ for a match with EAX while CX-- != 0\n\t"
"JNE,s miss\t\t# Missed: flags NZ\n\t"
"MOV [$sub+Klass::secondary_super_cache],$super\t# Hit: update cache, flags Z\n\t"