diff options
| author | Edward Nevill edward.nevill@linaro.org <Edward Nevill edward.nevill@linaro.org> | 2014-05-24 20:31:23 +0100 |
|---|---|---|
| committer | Edward Nevill edward.nevill@linaro.org <Edward Nevill edward.nevill@linaro.org> | 2014-05-24 20:31:23 +0100 |
| commit | 97bd4c4cb4f21c41599d6cfb9e91aa86d32839f0 (patch) | |
| tree | 43a013cb2b1088fc080065ba05f6dba0789dedcf /src/cpu/aarch64/vm/macroAssembler_aarch64.hpp | |
| parent | 87957780128ee0f86ea534960e937e2caf9f6bb5 (diff) | |
Add support for CRC32 intrinsic
Diffstat (limited to 'src/cpu/aarch64/vm/macroAssembler_aarch64.hpp')
| -rw-r--r-- | src/cpu/aarch64/vm/macroAssembler_aarch64.hpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp b/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp index 4b0a103cf..a0aacd310 100644 --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp @@ -1226,6 +1226,11 @@ public: void verified_entry(int framesize, bool stack_bang, bool fp_mode_24b); #endif + // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic. + void kernel_crc32(Register crc, Register buf, Register len, + Register table0, Register table1, Register table2, Register table3, + Register tmp, Register tmp2, Register tmp3); + #undef VIRTUAL // Stack push and pop individual 64 bit registers @@ -1367,6 +1372,12 @@ public: // Used by aarch64.ad to control code generation static bool use_acq_rel_for_volatile_fields(); + + // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic. + void update_byte_crc32(Register crc, Register val, Register table); + void update_word_crc32(Register crc, Register v, Register tmp, + Register table0, Register table1, Register table2, Register table3, + bool upper = false); }; // Used by aarch64.ad to control code generation |