diff options
| author | Archit Taneja <architt@codeaurora.org> | 2015-10-12 11:16:48 +0530 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2015-12-14 10:40:40 -0500 |
| commit | cea65dbd6a96bd97818a7a95034a046409040afa (patch) | |
| tree | 61181585fc4265def4eb72f183c2ef86b73ca77b /drivers/gpu/drm/msm/dsi/dsi_cfg.c | |
| parent | 4bfa97489ae786c95d0f2999326a524443013cc1 (diff) | |
drm/msm/dsi: Add dsi_cfg for APQ8064
Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to
be supported, add a list of bus clocks that are required by the DSIv2
block.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi_cfg.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/dsi_cfg.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index c40044f8a6c0..2a827d8093a2 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -13,9 +13,22 @@ #include "dsi_cfg.h" -/* DSI v2 has not been supported by now */ -static const struct msm_dsi_config dsi_v2_cfg = { +static const char * const dsi_v2_bus_clk_names[] = { + "core_mmss_clk", "iface_clk", "bus_clk", +}; + +static const struct msm_dsi_config apq8064_dsi_cfg = { .io_offset = 0, + .reg_cfg = { + .num = 3, + .regs = { + {"vdda", 1200000, 1200000, 100000, 100}, + {"avdd", 3000000, 3000000, 110000, 100}, + {"vddio", 1800000, 1800000, 100000, 100}, + }, + }, + .bus_clk_names = dsi_v2_bus_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), }; static const char * const dsi_6g_bus_clk_names[] = { @@ -75,7 +88,7 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { }; static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { - {MSM_DSI_VER_MAJOR_V2, U32_MAX, &dsi_v2_cfg}, + {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, &msm8974_apq8084_dsi_cfg}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1, |