diff options
| author | Archit Taneja <architt@codeaurora.org> | 2016-09-14 12:23:07 +0530 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2017-02-06 11:28:44 -0500 |
| commit | 3a3ff88a0fc18ad45f0f5818a4f3de395da68d47 (patch) | |
| tree | 79549d4c5707d01ef1934137e9e8711e217b213c /drivers/gpu/drm/msm/dsi/dsi_cfg.c | |
| parent | a1b1a4f7e4c3cf3352ae477b86ddea2d4ed35d3e (diff) | |
drm/msm/dsi: Add 8x96 info in dsi_cfg
Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver
enables core_mmss_clk. We're seeing some branch clock warnings on
8x96 when enabling this. There doesn't seem to be any negative effect
with not enabling this clock, so use it once we figure out why we
get the warnings.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi_cfg.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/dsi_cfg.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 63436d8ee470..a5d75c9b3a73 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -94,6 +94,30 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { .num_dsi = 2, }; +/* + * TODO: core_mmss_clk fails to enable for some reason, but things work fine + * without it too. Figure out why it doesn't enable and uncomment below + */ +static const char * const dsi_8996_bus_clk_names[] = { + "mdp_core_clk", "iface_clk", "bus_clk", /* "core_mmss_clk", */ +}; + +static const struct msm_dsi_config msm8996_dsi_cfg = { + .io_offset = DSI_6G_REG_SHIFT, + .reg_cfg = { + .num = 2, + .regs = { + {"vdda", 18160, 1 }, /* 1.25 V */ + {"vcca", 17000, 32 }, /* 0.925 V */ + {"vddio", 100000, 100 },/* 1.8 V */ + }, + }, + .bus_clk_names = dsi_8996_bus_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), + .io_start = { 0x994000, 0x996000 }, + .num_dsi = 2, +}; + static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, @@ -106,6 +130,7 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { &msm8974_apq8084_dsi_cfg}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg}, + {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg}, }; const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) |