diff options
| author | Tom Rini <trini@konsulko.com> | 2018-12-03 19:30:54 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-12-03 19:30:54 -0500 |
| commit | 0a3d59e01038a3a50484b8bfcf834376a7215af0 (patch) | |
| tree | fc58f6aa543d4f920d1b4b36dc52c534d6dc1afc | |
| parent | 9981c60ef583f3608eff8ab4837198f72240ea17 (diff) | |
| parent | 5f68f44c14ab93ffc44a9285e0970cba467276c6 (diff) | |
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze:
- Use default functions for memory decoding
- Showing model from DT
zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets
zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting
nand:
- arasan: Add subpage configuration
net:
- gem: Add 64bit DMA support
46 files changed, 342 insertions, 76 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 96eadb6fd6..eb6ce299f0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -942,6 +942,7 @@ config ARCH_ZYNQMP select OF_CONTROL select SPL_BOARD_INIT if SPL select SPL_CLK if SPL + select SPL_SEPARATE_BSS if SPL select SUPPORT_SPL imply BOARD_LATE_INIT imply CMD_DM diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d8be3a30dc..c5960d3f92 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo-z7.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ avnet-ultra96-rev1.dtb \ + zynqmp-mini.dtb \ zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc1.dtb \ zynqmp-mini-nand.dtb \ diff --git a/arch/arm/dts/zynq-cse-qspi-single.dts b/arch/arm/dts/zynq-cse-qspi-single.dts index 3252d6a444..0d680dfc06 100644 --- a/arch/arm/dts/zynq-cse-qspi-single.dts +++ b/arch/arm/dts/zynq-cse-qspi-single.dts @@ -7,6 +7,6 @@ #include "zynq-cse-qspi.dtsi" -&qspi { +&flash0 { spi-rx-bus-width = <4>; }; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 2b169468b0..65af4081ff 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -59,7 +59,7 @@ #address-cells = <1>; #size-cells = <0>; num-cs = <1>; - flash@0 { + flash0: flash@0 { compatible = "n25q128a11"; reg = <0x0>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 24dd1ab9df..2213bb2fdf 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -10,7 +10,7 @@ /dts-v1/; / { - model = "ZynqMP MINI EMMC"; + model = "ZynqMP MINI EMMC0"; compatible = "xlnx,zynqmp"; #address-cells = <2>; #size-cells = <2>; @@ -53,6 +53,7 @@ status = "disabled"; reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; + clocks = <&clk_xin &clk_xin>; xlnx,device_id = <0>; }; }; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 530ab3cdc2..0538da468b 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -10,7 +10,7 @@ /dts-v1/; / { - model = "ZynqMP MINI EMMC"; + model = "ZynqMP MINI EMMC1"; compatible = "xlnx,zynqmp"; #address-cells = <2>; #size-cells = <2>; diff --git a/arch/arm/dts/zynqmp-mini.dts b/arch/arm/dts/zynqmp-mini.dts new file mode 100644 index 0000000000..1faee9ec75 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2017, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &dcc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; +}; + +&dcc { + status = "okay"; +}; diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts index ea1ca561a1..5c212ba468 100644 --- a/arch/arm/dts/zynqmp-zc1232-revA.dts +++ b/arch/arm/dts/zynqmp-zc1232-revA.dts @@ -41,7 +41,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* 32MB FIXME */ + compatible = "m25p80", "spi-flash"; /* 32MB FIXME */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index 2493883e6f..881aacc582 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -41,7 +41,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* 32MB */ + compatible = "m25p80", "spi-flash"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zc1275-revA.dts b/arch/arm/dts/zynqmp-zc1275-revA.dts index 2543a674ca..7403f153e4 100644 --- a/arch/arm/dts/zynqmp-zc1275-revA.dts +++ b/arch/arm/dts/zynqmp-zc1275-revA.dts @@ -41,7 +41,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* 32MB */ + compatible = "m25p80", "spi-flash"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zc1275-revB.dts b/arch/arm/dts/zynqmp-zc1275-revB.dts index f694faeeb5..e84b2da164 100644 --- a/arch/arm/dts/zynqmp-zc1275-revB.dts +++ b/arch/arm/dts/zynqmp-zc1275-revB.dts @@ -42,7 +42,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* 32MB */ + compatible = "m25p80", "spi-flash"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index c794c91de1..9768dfe044 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -101,7 +101,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* Micron MT25QU512ABB8ESF */ + compatible = "m25p80", "spi-flash"; /* Micron MT25QU512ABB8ESF */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index fb49b4fcb4..9afbbb63b4 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -177,6 +177,35 @@ status = "okay"; }; +&qspi { + status = "okay"; + flash@0 { + compatible = "m25p80", "spi-flash"; /* 32MB */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; /* also DUAL configuration possible */ + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@qspi-fsbl-uboot { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@qspi-linux { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@qspi-device-tree { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@qspi-rootfs { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; + }; +}; + &rtc { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 2fffe177b5..05491e9bbc 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -104,6 +104,7 @@ ltc2954: ltc2954 { /* U7 */ compatible = "lltc,ltc2954", "lltc,ltc2952"; + status = "disabled"; trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */ /* If there is HW watchdog on mezzanine this signal should be connected there */ watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */ diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index ac7035fde7..05be919f6f 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -422,6 +422,7 @@ temperature-stability = <50>; factory-fout = <300000000>; clock-frequency = <300000000>; + clock-output-names = "si570_user"; }; }; i2c@3 { @@ -435,6 +436,7 @@ temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; clock-frequency = <148500000>; + clock-output-names = "si570_mgt"; }; }; i2c@4 { diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 6a4b701ab8..431dff52fe 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -169,7 +169,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* n25q512a 128MiB */ + compatible = "m25p80", "spi-flash"; /* n25q512a 128MiB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index fe742b894b..becc6a0fe1 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -175,7 +175,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80"; /* n25q512a 128MiB */ + compatible = "m25p80", "spi-flash"; /* n25q512a 128MiB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index a30268b7b1..7735e9d2c8 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -395,6 +395,7 @@ temperature-stability = <50>; factory-fout = <300000000>; clock-frequency = <300000000>; + clock-output-names = "si570_user"; }; }; i2c@3 { @@ -408,6 +409,7 @@ temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; clock-frequency = <148500000>; + clock-output-names = "si570_mgt"; }; }; i2c@4 { @@ -512,7 +514,7 @@ status = "okay"; is-dual = <1>; flash@0 { - compatible = "m25p80"; /* 32MB */ + compatible = "m25p80", "spi-flash"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 6c1a0f7a3b..172e6cc2ca 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -318,6 +318,7 @@ temperature-stability = <50>; factory-fout = <300000000>; clock-frequency = <300000000>; + clock-output-names = "si570_user"; }; }; i2c@3 { @@ -331,6 +332,7 @@ temperature-stability = <50>; factory-fout = <156250000>; clock-frequency = <148500000>; + clock-output-names = "si570_mgt"; }; }; i2c@4 { @@ -449,7 +451,7 @@ status = "okay"; is-dual = <1>; flash@0 { - compatible = "m25p80"; /* 32MB */ + compatible = "m25p80", "spi-flash"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 44fb48b347..c946ec3208 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -32,34 +32,13 @@ ulong ram_base; int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = ram_base; - gd->bd->bi_dram[0].size = get_effective_memsize(); - - return 0; + return fdtdec_setup_memory_banksize(); } int dram_init(void) { - int node; - fdt_addr_t addr; - fdt_size_t size; - const void *blob = gd->fdt_blob; - - node = fdt_node_offset_by_prop_value(blob, -1, "device_type", - "memory", 7); - if (node == -FDT_ERR_NOTFOUND) { - debug("DRAM: Can't get memory node\n"); - return 1; - } - addr = fdtdec_get_addr_size(blob, node, "reg", &size); - if (addr == FDT_ADDR_T_NONE || size == 0) { - debug("DRAM: Can't get base address or size\n"); - return 1; - } - ram_base = addr; - - gd->ram_top = addr; /* In setup_dest_addr() is done +ram_size */ - gd->ram_size = size; + if (fdtdec_setup_mem_size_base() != 0) + return -EINVAL; return 0; }; diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c index 0b2a8178d6..8b48ea3a03 100644 --- a/board/xilinx/zynq/cmds.c +++ b/board/xilinx/zynq/cmds.c @@ -493,6 +493,7 @@ static int do_zynq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return cmd_process_error(zynq_cmd, ret); } +#ifdef CONFIG_SYS_LONGHELP static char zynq_help_text[] = "" #ifdef CONFIG_CMD_ZYNQ_RSA @@ -507,6 +508,7 @@ static char zynq_help_text[] = " destination address\n" #endif ; +#endif U_BOOT_CMD(zynq, 6, 0, do_zynq, "Zynq specific commands", zynq_help_text diff --git a/board/xilinx/zynq/zynq-cse-nand b/board/xilinx/zynq/zynq-cse-nand new file mode 120000 index 0000000000..9d89a9957e --- /dev/null +++ b/board/xilinx/zynq/zynq-cse-nand @@ -0,0 +1 @@ +zynq-zc770-xm011
\ No newline at end of file diff --git a/board/xilinx/zynq/zynq-cse-nor b/board/xilinx/zynq/zynq-cse-nor new file mode 120000 index 0000000000..bb80693eab --- /dev/null +++ b/board/xilinx/zynq/zynq-cse-nor @@ -0,0 +1 @@ +zynq-zc770-xm012
\ No newline at end of file diff --git a/board/xilinx/zynqmp/zynqmp-mini b/board/xilinx/zynqmp/zynqmp-mini new file mode 120000 index 0000000000..5a70cd2f5e --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp-mini @@ -0,0 +1 @@ +zynqmp-zcu102-rev1.0
\ No newline at end of file diff --git a/board/xilinx/zynqmp/zynqmp-mini-emmc0 b/board/xilinx/zynqmp/zynqmp-mini-emmc0 new file mode 120000 index 0000000000..f2beed309a --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp-mini-emmc0 @@ -0,0 +1 @@ +zynqmp-zcu100-revC
\ No newline at end of file diff --git a/board/xilinx/zynqmp/zynqmp-mini-emmc1 b/board/xilinx/zynqmp/zynqmp-mini-emmc1 new file mode 120000 index 0000000000..5a70cd2f5e --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp-mini-emmc1 @@ -0,0 +1 @@ +zynqmp-zcu102-rev1.0
\ No newline at end of file diff --git a/board/xilinx/zynqmp/zynqmp-mini-qspi b/board/xilinx/zynqmp/zynqmp-mini-qspi new file mode 120000 index 0000000000..5a70cd2f5e --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp-mini-qspi @@ -0,0 +1 @@ +zynqmp-zcu102-rev1.0
\ No newline at end of file diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index af91cde7c8..13c404b6ef 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -72,6 +72,7 @@ static const struct { .id = 0x20, .ver = 0x12c, .name = "5cg", + .evexists = 1, }, { .id = 0x21, @@ -88,6 +89,7 @@ static const struct { .id = 0x21, .ver = 0x12c, .name = "4cg", + .evexists = 1, }, { .id = 0x30, @@ -104,6 +106,7 @@ static const struct { .id = 0x30, .ver = 0x12c, .name = "7cg", + .evexists = 1, }, { .id = 0x38, @@ -234,14 +237,18 @@ int chip_id(unsigned char id) #define ZYNQMP_VERSION_SIZE 9 #define ZYNQMP_PL_STATUS_BIT 9 +#define ZYNQMP_IPDIS_VCU_BIT 8 #define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT) #define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK) +#define ZYNQMP_CSU_VCUDIS_VER_MASK ZYNQMP_CSU_VERSION_MASK & \ + ~BIT(ZYNQMP_IPDIS_VCU_BIT) +#define MAX_VARIANTS_EV 3 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ !defined(CONFIG_SPL_BUILD) static char *zynqmp_get_silicon_idcode_name(void) { - u32 i, id, ver; + u32 i, id, ver, j; char *buf; static char name[ZYNQMP_VERSION_SIZE]; @@ -249,24 +256,43 @@ static char *zynqmp_get_silicon_idcode_name(void) ver = chip_id(IDCODE2); for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { - if ((zynqmp_devices[i].id == id) && - (zynqmp_devices[i].ver == (ver & - ZYNQMP_CSU_VERSION_MASK))) { - strncat(name, "zu", 2); - strncat(name, zynqmp_devices[i].name, - ZYNQMP_VERSION_SIZE - 3); - break; + if (zynqmp_devices[i].id == id) { + if (zynqmp_devices[i].evexists && + !(ver & ZYNQMP_PL_STATUS_MASK)) + break; + if (zynqmp_devices[i].ver == (ver & + ZYNQMP_CSU_VERSION_MASK)) + break; } } if (i >= ARRAY_SIZE(zynqmp_devices)) return "unknown"; - if (!zynqmp_devices[i].evexists) + strncat(name, "zu", 2); + if (!zynqmp_devices[i].evexists || + (ver & ZYNQMP_PL_STATUS_MASK)) { + strncat(name, zynqmp_devices[i].name, + ZYNQMP_VERSION_SIZE - 3); return name; + } - if (ver & ZYNQMP_PL_STATUS_MASK) - return name; + /* + * Here we are means, PL not powered up and ev variant + * exists. So, we need to ignore VCU disable bit(8) in + * version and findout if its CG or EG/EV variant. + */ + for (j = 0; j < MAX_VARIANTS_EV; j++, i++) { + if ((zynqmp_devices[i].ver & ~BIT(ZYNQMP_IPDIS_VCU_BIT)) == + (ver & ZYNQMP_CSU_VCUDIS_VER_MASK)) { + strncat(name, zynqmp_devices[i].name, + ZYNQMP_VERSION_SIZE - 3); + break; + } + } + + if (j >= MAX_VARIANTS_EV) + return "unknown"; if (strstr(name, "eg") || strstr(name, "ev")) { buf = strstr(name, "e"); @@ -517,6 +543,10 @@ int board_late_init(void) char *env_targets; int ret; +#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD) + usb_ether_init(); +#endif + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { debug("Saved variables - Skipping\n"); return 0; diff --git a/configs/avnet_ultra96_rev1_defconfig b/configs/avnet_ultra96_rev1_defconfig index c49c9f2346..9ca884e405 100644 --- a/configs/avnet_ultra96_rev1_defconfig +++ b/configs/avnet_ultra96_rev1_defconfig @@ -92,5 +92,6 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_WDT=y CONFIG_WDT_CDNS=y +CONFIG_SPL_GZIP=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 0b21020cff..02e62e2ee8 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=romfs" CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig new file mode 100644 index 0000000000..e54c81cb48 --- /dev/null +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0xFFFC0000 +CONFIG_ENV_SIZE=0x80 +CONFIG_SYS_MEM_RSVD_FOR_MMU=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y +# CONFIG_CMD_ZYNQMP is not set +# CONFIG_IMAGE_FORMAT_LEGACY is not set +# CONFIG_BOARD_LATE_INIT is not set +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_AUTOBOOT is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +# CONFIG_PARTITIONS is not set +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" +# CONFIG_NET is not set +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_MMC is not set +# CONFIG_EFI_LOADER is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 917637ddac..9cdc944f0c 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -2,12 +2,11 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 -CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_SIZE=0x80 +CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y -CONFIG_BOOTDELAY=-1 CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set @@ -15,11 +14,14 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set @@ -42,11 +44,14 @@ CONFIG_CMD_MMC=y # CONFIG_MP is not set CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" # CONFIG_NET is not set +CONFIG_SPL_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 1ffa528d6d..74ea3a864e 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -2,12 +2,11 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 -CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_SIZE=0x80 +CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y -CONFIG_BOOTDELAY=-1 CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set @@ -15,11 +14,14 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set @@ -42,11 +44,14 @@ CONFIG_CMD_MMC=y # CONFIG_MP is not set CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" # CONFIG_NET is not set +CONFIG_SPL_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 74ba0c97f3..9267f69338 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -2,12 +2,10 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 -CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_SIZE=0x80 # CONFIG_CMD_ZYNQMP is not set -CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y -CONFIG_BOOTDELAY=-1 CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set @@ -16,6 +14,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index db129b6ce7..de7bf07955 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -2,19 +2,20 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 -CONFIG_ENV_SIZE=0x578 +CONFIG_ENV_SIZE=0x80 +CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y # CONFIG_CMD_ZYNQMP is not set CONFIG_NR_DRAM_BANKS=1 # CONFIG_IMAGE_FORMAT_LEGACY is not set -CONFIG_BOOTDELAY=-1 # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set @@ -43,11 +44,14 @@ CONFIG_CMD_SF=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set # CONFIG_PARTITIONS is not set +CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" # CONFIG_NET is not set +CONFIG_SPL_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig index dc1e7cd824..429bfd4fd3 100644 --- a/configs/xilinx_zynqmp_zcu100_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig @@ -92,5 +92,6 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_WDT=y CONFIG_WDT_CDNS=y +CONFIG_SPL_GZIP=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index 02dd5ed2b7..41a03371d5 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -111,4 +111,5 @@ CONFIG_USB_GADGET_MANUFACTURER="Xilinx" CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_FUNCTION_THOR=y +CONFIG_SPL_GZIP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig index 33258e41b2..0357b17445 100644 --- a/configs/xilinx_zynqmp_zcu104_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu104" +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu104_revC" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 @@ -53,6 +53,7 @@ CONFIG_CMD_PCA953X=y CONFIG_SYS_I2C_ZYNQ=y CONFIG_ZYNQ_I2C1=y CONFIG_MISC=y +CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 44ad5bd69c..608619e40c 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -9,7 +9,11 @@ CONFIG_SYS_MALLOC_LEN=0x1000 # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Zynq> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set @@ -36,11 +40,11 @@ CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NET is not set # CONFIG_CMD_MISC is not set # CONFIG_PARTITIONS is not set CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" +# CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index b4831f89a1..b4f1e313b1 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -6,11 +6,14 @@ CONFIG_ENV_SIZE=0x190 CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SYS_MALLOC_LEN=0x1000 -CONFIG_BOOTDELAY=-1 # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Zynq> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set @@ -36,11 +39,11 @@ CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NET is not set # CONFIG_CMD_MISC is not set # CONFIG_PARTITIONS is not set CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" +# CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 2e1e34d0ae..2aee069bb1 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -11,16 +11,17 @@ CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SYS_MALLOC_LEN=0x1000 # CONFIG_CMD_ZYNQ is not set CONFIG_DEBUG_UART=y -CONFIG_DISTRO_DEFAULTS=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set -CONFIG_BOOTDELAY=-1 -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_ARCH_EARLY_INIT_R is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Zynq> " +# CONFIG_AUTOBOOT is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 5223a9bc68..27e6bd1e0e 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_PROMPT="Zynq> " CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index 41db9f8bb9..dc531ccb68 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -1201,6 +1201,10 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum) mtd = nand_to_mtd(nand_chip); nand_set_controller_data(nand_chip, nand); +#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + nand_chip->options |= NAND_NO_SUBPAGE_WRITE; +#endif + /* Set the driver entry points for MTD */ nand_chip->cmdfunc = arasan_nand_cmd_function; nand_chip->select_chip = arasan_nand_select_chip; diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index bc33126536..9bd79b198a 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -86,15 +86,24 @@ DECLARE_GLOBAL_DATA_PTR; /* Set with binary 00011000 to use 1536 byte(1*max length frame/buffer) */ #define ZYNQ_GEM_DMACR_RXBUF 0x00180000 +#if defined(CONFIG_PHYS_64BIT) +# define ZYNQ_GEM_DMA_BUS_WIDTH BIT(30) /* 64 bit bus */ +#else +# define ZYNQ_GEM_DMA_BUS_WIDTH (0 << 30) /* 32 bit bus */ +#endif + #define ZYNQ_GEM_DMACR_INIT (ZYNQ_GEM_DMACR_BLENGTH | \ ZYNQ_GEM_DMACR_RXSIZE | \ ZYNQ_GEM_DMACR_TXSIZE | \ - ZYNQ_GEM_DMACR_RXBUF) + ZYNQ_GEM_DMACR_RXBUF | \ + ZYNQ_GEM_DMA_BUS_WIDTH) #define ZYNQ_GEM_TSR_DONE 0x00000020 /* Tx done mask */ #define ZYNQ_GEM_PCS_CTL_ANEG_ENBL 0x1000 +#define ZYNQ_GEM_DCFG_DBG6_DMA_64B BIT(23) + /* Use MII register 1 (MII status register) to detect PHY */ #define PHY_DETECT_REG 1 @@ -143,16 +152,26 @@ struct zynq_gem_regs { u32 stat[STAT_SIZE]; /* 0x100 - Octects transmitted Low reg */ u32 reserved9[20]; u32 pcscntrl; - u32 reserved7[143]; + u32 rserved12[36]; + u32 dcfg6; /* 0x294 Design config reg6 */ + u32 reserved7[106]; u32 transmit_q1_ptr; /* 0x440 - Transmit priority queue 1 */ u32 reserved8[15]; u32 receive_q1_ptr; /* 0x480 - Receive priority queue 1 */ + u32 reserved10[17]; + u32 upper_txqbase; /* 0x4C8 - Upper tx_q base addr */ + u32 reserved11[2]; + u32 upper_rxqbase; /* 0x4D4 - Upper rx_q base addr */ }; /* BD descriptors */ struct emac_bd { u32 addr; /* Next descriptor pointer */ u32 status; +#if defined(CONFIG_PHYS_64BIT) + u32 addr_hi; + u32 reserved; +#endif }; #define RX_BUF 32 @@ -183,6 +202,7 @@ struct zynq_gem_priv { struct clk clk; u32 max_speed; bool int_pcs; + bool dma_64bit; }; static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, @@ -363,6 +383,23 @@ static int zynq_gem_init(struct udevice *dev) struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2]; + if (readl(®s->dcfg6) & ZYNQ_GEM_DCFG_DBG6_DMA_64B) + priv->dma_64bit = true; + else + priv->dma_64bit = false; + +#if defined(CONFIG_PHYS_64BIT) + if (!priv->dma_64bit) { + printf("ERR: %s: Using 64-bit DMA but HW doesn't support it\n", + __func__); + return -EINVAL; + } +#else + if (priv->dma_64bit) + debug("WARN: %s: Not using 64-bit dma even HW supports it\n", + __func__); +#endif + if (!priv->init) { /* Disable all interrupts */ writel(0xFFFFFFFF, ®s->idr); @@ -390,13 +427,21 @@ static int zynq_gem_init(struct udevice *dev) for (i = 0; i < RX_BUF; i++) { priv->rx_bd[i].status = 0xF0000000; priv->rx_bd[i].addr = - ((ulong)(priv->rxbuffers) + - (i * PKTSIZE_ALIGN)); - } + (lower_32_bits((ulong)(priv->rxbuffers) + + (i * PKTSIZE_ALIGN))); +#if defined(CONFIG_PHYS_64BIT) + priv->rx_bd[i].addr_hi = + (upper_32_bits((ulong)(priv->rxbuffers) + + (i * PKTSIZE_ALIGN))); +#endif + } /* WRAP bit to last BD */ priv->rx_bd[--i].addr |= ZYNQ_GEM_RXBUF_WRAP_MASK; /* Write RxBDs to IP */ - writel((ulong)priv->rx_bd, ®s->rxqbase); + writel(lower_32_bits((ulong)priv->rx_bd), ®s->rxqbase); +#if defined(CONFIG_PHYS_64BIT) + writel(upper_32_bits((ulong)priv->rx_bd), ®s->upper_rxqbase); +#endif /* Setup for DMA Configuration register */ writel(ZYNQ_GEM_DMACR_INIT, ®s->dmacr); @@ -406,12 +451,18 @@ static int zynq_gem_init(struct udevice *dev) /* Disable the second priority queue */ dummy_tx_bd->addr = 0; +#if defined(CONFIG_PHYS_64BIT) + dummy_tx_bd->addr_hi = 0; +#endif dummy_tx_bd->status = ZYNQ_GEM_TXBUF_WRAP_MASK | ZYNQ_GEM_TXBUF_LAST_MASK| ZYNQ_GEM_TXBUF_USED_MASK; dummy_rx_bd->addr = ZYNQ_GEM_RXBUF_WRAP_MASK | ZYNQ_GEM_RXBUF_NEW_MASK; +#if defined(CONFIG_PHYS_64BIT) + dummy_rx_bd->addr_hi = 0; +#endif dummy_rx_bd->status = 0; writel((ulong)dummy_tx_bd, ®s->transmit_q1_ptr); @@ -485,7 +536,8 @@ static int zynq_gem_init(struct udevice *dev) static int zynq_gem_send(struct udevice *dev, void *ptr, int len) { - u32 addr, size; + dma_addr_t addr; + u32 size; struct zynq_gem_priv *priv = dev_get_priv(dev); struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *current_bd = &priv->tx_bd[1]; @@ -493,17 +545,26 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len) /* Setup Tx BD */ memset(priv->tx_bd, 0, sizeof(struct emac_bd)); - priv->tx_bd->addr = (ulong)ptr; + priv->tx_bd->addr = lower_32_bits((ulong)ptr); +#if defined(CONFIG_PHYS_64BIT) + priv->tx_bd->addr_hi = upper_32_bits((ulong)ptr); +#endif priv->tx_bd->status = (len & ZYNQ_GEM_TXBUF_FRMLEN_MASK) | ZYNQ_GEM_TXBUF_LAST_MASK; /* Dummy descriptor to mark it as the last in descriptor chain */ current_bd->addr = 0x0; +#if defined(CONFIG_PHYS_64BIT) + current_bd->addr_hi = 0x0; +#endif current_bd->status = ZYNQ_GEM_TXBUF_WRAP_MASK | ZYNQ_GEM_TXBUF_LAST_MASK| ZYNQ_GEM_TXBUF_USED_MASK; /* setup BD */ - writel((ulong)priv->tx_bd, ®s->txqbase); + writel(lower_32_bits((ulong)priv->tx_bd), ®s->txqbase); +#if defined(CONFIG_PHYS_64BIT) + writel(upper_32_bits((ulong)priv->tx_bd), ®s->upper_txqbase); +#endif addr = (ulong) ptr; addr &= ~(ARCH_DMA_MINALIGN - 1); @@ -531,7 +592,7 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len) static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp) { int frame_len; - u32 addr; + dma_addr_t addr; struct zynq_gem_priv *priv = dev_get_priv(dev); struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current]; @@ -550,8 +611,14 @@ static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp) return -1; } +#if defined(CONFIG_PHYS_64BIT) + addr = (dma_addr_t)((current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK) + | ((dma_addr_t)current_bd->addr_hi << 32)); +#else addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK; +#endif addr &= ~(ARCH_DMA_MINALIGN - 1); + *packetp = (uchar *)(uintptr_t)addr; return frame_len; diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 00ca3d4be8..7138851dae 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -12,9 +12,12 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 +#define CONFIG_EXTRA_ENV_SETTINGS + #include <configs/xilinx_zynqmp.h> /* Undef unneeded configs */ +#undef CONFIG_BOOTCOMMAND #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_MALLOC_LEN #undef CONFIG_ZLIB diff --git a/include/configs/xilinx_zynqmp_zcu104_revC.h b/include/configs/xilinx_zynqmp_zcu104_revC.h new file mode 100644 index 0000000000..8b3ae36d0f --- /dev/null +++ b/include/configs/xilinx_zynqmp_zcu104_revC.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Xilinx ZynqMP zcu104 + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + */ + +#ifndef __CONFIG_ZYNQMP_ZCU104_REVC_H +#define __CONFIG_ZYNQMP_ZCU104_REVC_H + +#include <configs/xilinx_zynqmp_zcu104.h> + +#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 +#define CONFIG_ZYNQ_EEPROM_BUS 1 + +#endif /* __CONFIG_ZYNQMP_ZCU104_REVC_H */ |