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authorLionel Debieve <lionel.debieve@foss.st.com>2021-11-03 17:00:42 +0100
committerJérôme Forissier <jerome@forissier.org>2021-11-08 11:28:53 +0100
commitdf7cecc0f9e66ccc099e9c64d79e2a1354880131 (patch)
tree768028a16b630744af949ed83683ca00621d39f3 /core
parentcdf16193d7c64a8901f34f3945eb442b3aeff6a2 (diff)
core: kernel: use size_t instead of ssize_t for _fdt_reg_size()
Size is read from the reg device tree property as an unsigned value coming from fdt32_to_cpu(). Use a size_t with associated error code DT_INFO_INVALID_REG_SIZE as return in prototype. Update the current users according to this change. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'core')
-rw-r--r--core/arch/arm/plat-ls/main.c4
-rw-r--r--core/drivers/crypto/caam/hal/common/hal_cfg_dt.c4
-rw-r--r--core/include/kernel/dt.h10
-rw-r--r--core/kernel/dt.c14
4 files changed, 16 insertions, 16 deletions
diff --git a/core/arch/arm/plat-ls/main.c b/core/arch/arm/plat-ls/main.c
index a000e4cb..5ddee807 100644
--- a/core/arch/arm/plat-ls/main.c
+++ b/core/arch/arm/plat-ls/main.c
@@ -128,7 +128,7 @@ void console_init(void)
static TEE_Result get_gic_base_addr_from_dt(paddr_t *gic_addr)
{
paddr_t paddr = 0;
- ssize_t size = 0;
+ size_t size = 0;
void *fdt = get_embedded_dt();
int gic_offset = 0;
@@ -147,7 +147,7 @@ static TEE_Result get_gic_base_addr_from_dt(paddr_t *gic_addr)
}
size = _fdt_reg_size(fdt, gic_offset);
- if (size < 0) {
+ if (size == DT_INFO_INVALID_REG_SIZE) {
EMSG("GIC: Unable to get size of base addr from DT");
return TEE_ERROR_ITEM_NOT_FOUND;
}
diff --git a/core/drivers/crypto/caam/hal/common/hal_cfg_dt.c b/core/drivers/crypto/caam/hal/common/hal_cfg_dt.c
index 2bc4ec56..751c3359 100644
--- a/core/drivers/crypto/caam/hal/common/hal_cfg_dt.c
+++ b/core/drivers/crypto/caam/hal/common/hal_cfg_dt.c
@@ -52,7 +52,7 @@ static paddr_t find_jr_offset(void *fdt, int status, int *find_node)
void caam_hal_cfg_get_ctrl_dt(void *fdt, vaddr_t *ctrl_base)
{
- ssize_t size = 0;
+ size_t size = 0;
int node = 0;
paddr_t pctrl_base = 0;
@@ -75,7 +75,7 @@ void caam_hal_cfg_get_ctrl_dt(void *fdt, vaddr_t *ctrl_base)
}
size = _fdt_reg_size(fdt, node);
- if (size < 0) {
+ if (size == DT_INFO_INVALID_REG_SIZE) {
HAL_TRACE("CAAM control base address size not defined");
return;
}
diff --git a/core/include/kernel/dt.h b/core/include/kernel/dt.h
index 20db34e1..7ae6f4ff 100644
--- a/core/include/kernel/dt.h
+++ b/core/include/kernel/dt.h
@@ -22,7 +22,7 @@
#define DT_STATUS_OK_SEC BIT(1)
#define DT_INFO_INVALID_REG ((paddr_t)-1)
-#define DT_INFO_INVALID_REG_SIZE ((ssize_t)-1)
+#define DT_INFO_INVALID_REG_SIZE ((size_t)-1)
#define DT_INFO_INVALID_CLOCK -1
#define DT_INFO_INVALID_RESET -1
#define DT_INFO_INVALID_INTERRUPT -1
@@ -148,7 +148,7 @@ paddr_t _fdt_reg_base_address(const void *fdt, int offs);
* Return the reg size for the reg property of the specified node or -1 in case
* of error
*/
-ssize_t _fdt_reg_size(const void *fdt, int offs);
+size_t _fdt_reg_size(const void *fdt, int offs);
/*
* Read the status and secure-status properties into a bitfield.
@@ -199,10 +199,10 @@ static inline paddr_t _fdt_reg_base_address(const void *fdt __unused,
return (paddr_t)-1;
}
-static inline ssize_t _fdt_reg_size(const void *fdt __unused,
- int offs __unused)
+static inline size_t _fdt_reg_size(const void *fdt __unused,
+ int offs __unused)
{
- return -1;
+ return (size_t)-1;
}
static inline int _fdt_get_status(const void *fdt __unused, int offs __unused)
diff --git a/core/kernel/dt.c b/core/kernel/dt.c
index fdb72ca3..4af51f37 100644
--- a/core/kernel/dt.c
+++ b/core/kernel/dt.c
@@ -101,7 +101,7 @@ int dt_map_dev(const void *fdt, int offs, vaddr_t *base, size_t *size)
enum teecore_memtypes mtype;
paddr_t pbase;
vaddr_t vbase;
- ssize_t sz;
+ size_t sz;
int st;
assert(cpu_mmu_enabled());
@@ -114,7 +114,7 @@ int dt_map_dev(const void *fdt, int offs, vaddr_t *base, size_t *size)
if (pbase == DT_INFO_INVALID_REG)
return -1;
sz = _fdt_reg_size(fdt, offs);
- if (sz < 0)
+ if (sz == DT_INFO_INVALID_REG_SIZE)
return -1;
if ((st & DT_STATUS_OK_SEC) && !(st & DT_STATUS_OK_NSEC))
@@ -188,7 +188,7 @@ paddr_t _fdt_reg_base_address(const void *fdt, int offs)
return _fdt_read_paddr(reg, ncells);
}
-ssize_t _fdt_reg_size(const void *fdt, int offs)
+size_t _fdt_reg_size(const void *fdt, int offs)
{
const uint32_t *reg;
uint32_t sz;
@@ -202,22 +202,22 @@ ssize_t _fdt_reg_size(const void *fdt, int offs)
reg = (const uint32_t *)fdt_getprop(fdt, offs, "reg", &len);
if (!reg)
- return -1;
+ return DT_INFO_INVALID_REG_SIZE;
n = fdt_address_cells(fdt, parent);
if (n < 1 || n > 2)
- return -1;
+ return DT_INFO_INVALID_REG_SIZE;
reg += n;
n = fdt_size_cells(fdt, parent);
if (n < 1 || n > 2)
- return -1;
+ return DT_INFO_INVALID_REG_SIZE;
sz = fdt32_to_cpu(*reg);
if (n == 2) {
if (sz)
- return -1;
+ return DT_INFO_INVALID_REG_SIZE;
reg++;
sz = fdt32_to_cpu(*reg);
}